mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 00:16:57 +07:00
df803639ee
Add the control register as the base for the clock nodes which are missing them. This squashes some 78 warnings of the effect when built with W=1. Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
412 lines
9.7 KiB
Plaintext
412 lines
9.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for Keystone 2 clock tree
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*
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* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
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*/
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mainmuxclk: mainmuxclk@2310108 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-mux-clock";
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clocks = <&mainpllclk>, <&refclksys>;
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reg = <0x02310108 4>;
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bit-shift = <23>;
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bit-mask = <1>;
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clock-output-names = "mainmuxclk";
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};
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chipclk1: chipclk1 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&mainmuxclk>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "chipclk1";
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};
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chipclk1rstiso: chipclk1rstiso {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&mainmuxclk>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso";
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};
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gemtraceclk: gemtraceclk@2310120 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-divider-clock";
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clocks = <&mainmuxclk>;
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reg = <0x02310120 4>;
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bit-shift = <0>;
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bit-mask = <8>;
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clock-output-names = "gemtraceclk";
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};
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chipstmxptclk: chipstmxptclk@2310164 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-divider-clock";
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clocks = <&mainmuxclk>;
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reg = <0x02310164 4>;
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bit-shift = <0>;
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bit-mask = <8>;
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clock-output-names = "chipstmxptclk";
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};
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chipclk12: chipclk12 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <2>;
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clock-mult = <1>;
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clock-output-names = "chipclk12";
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};
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chipclk13: chipclk13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "chipclk13";
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};
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paclk13: paclk13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&papllclk>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "paclk13";
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};
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chipclk14: chipclk14 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <4>;
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clock-mult = <1>;
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clock-output-names = "chipclk14";
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};
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chipclk16: chipclk16 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <6>;
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clock-mult = <1>;
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clock-output-names = "chipclk16";
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};
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chipclk112: chipclk112 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <12>;
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clock-mult = <1>;
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clock-output-names = "chipclk112";
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};
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chipclk124: chipclk124 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <24>;
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clock-mult = <1>;
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clock-output-names = "chipclk114";
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};
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chipclk1rstiso13: chipclk1rstiso13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso13";
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};
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chipclk1rstiso14: chipclk1rstiso14 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <4>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso14";
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};
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chipclk1rstiso16: chipclk1rstiso16 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <6>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso16";
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};
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chipclk1rstiso112: chipclk1rstiso112 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <12>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso112";
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};
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clkmodrst0: clkmodrst0@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "modrst0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkusb: clkusb@2350008 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "usb";
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reg = <0x02350008 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkaemifspi: clkaemifspi@235000c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "aemif-spi";
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reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkdebugsstrc: clkdebugsstrc@2350014 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "debugss-trc";
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reg = <0x02350014 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <1>;
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};
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clktetbtrc: clktetbtrc@2350018 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "tetb-trc";
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reg = <0x02350018 0xb00>, <0x02350004 0x400>;
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reg-names = "control", "domain";
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domain-id = <1>;
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};
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clkpa: clkpa@235001c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&paclk13>;
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clock-output-names = "pa";
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reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clkcpgmac: clkcpgmac@2350020 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkpa>;
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clock-output-names = "cpgmac";
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reg = <0x02350020 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clksa: clksa@2350024 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkpa>;
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clock-output-names = "sa";
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reg = <0x02350024 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clkpcie: clkpcie@2350028 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "pcie";
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reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
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reg-names = "control", "domain";
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domain-id = <3>;
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};
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clksr: clksr@2350034 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1rstiso112>;
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clock-output-names = "sr";
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reg = <0x02350034 0xb00>, <0x02350018 0x400>;
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reg-names = "control", "domain";
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domain-id = <6>;
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};
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clkgem0: clkgem0@235003c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1>;
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clock-output-names = "gem0";
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reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
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reg-names = "control", "domain";
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domain-id = <8>;
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};
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clkddr30: clkddr30@235005c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "ddr3-0";
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reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
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reg-names = "control", "domain";
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domain-id = <16>;
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};
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clkwdtimer0: clkwdtimer0@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer1: clkwdtimer1@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer1";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer2: clkwdtimer2@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer2";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer3: clkwdtimer3@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer3";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clktimer15: clktimer15@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer15";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkuart0: clkuart0@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "uart0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkuart1: clkuart1@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "uart1";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkaemif: clkaemif@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkaemifspi>;
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clock-output-names = "aemif";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkusim: clkusim@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "usim";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clki2c: clki2c@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "i2c";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkspi: clkspi@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkaemifspi>;
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clock-output-names = "spi";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkgpio: clkgpio@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "gpio";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkkeymgr: clkkeymgr@2350000 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "keymgr";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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};
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