Bin Meng 4f3f900846 riscv: Using CSR numbers to access CSRs ... Since commit a3182c91ef ("RISC-V: Access CSRs using CSR numbers"), we should prefer accessing CSRs using their CSR numbers, but there are several leftovers like sstatus / sptbr we missed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>		2019-08-30 11:04:19 -07:00
..
boot	riscv: dts: fu540-c000: drop "timebase-frequency"	2019-07-31 12:26:10 -07:00
configs	riscv: defconfig: Update the defconfig	2019-08-13 19:26:42 -07:00
include	RISC-V: Fix FIXMAP area corruption on RV32 systems	2019-08-28 15:30:12 -07:00
kernel	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
lib	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
mm	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
net	bpf, riscv: Enable zext optimization for more RV64G ALU ops	2019-07-05 23:55:41 +02:00
Kconfig	RISC-V: Parse cpu topology during boot.	2019-07-22 09:36:30 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.socs	riscv: select SiFive platform drivers with SOC_SIFIVE	2019-07-01 13:20:01 -07:00
Makefile	riscv: drop unneeded -Wall addition	2019-07-17 10:25:10 +09:00