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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a081568d70
As per the corresponding change to the serial drivers, arrange for ARM decompressors to give CRLF. Move the common putstr code into misc.c such that machines only need to supply "putc" and "flush" functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
86 lines
1.9 KiB
C
86 lines
1.9 KiB
C
/*
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* linux/include/asm-arm/arch-ep93xx/uncompress.h
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <asm/arch/ep93xx-regs.h>
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static unsigned char __raw_readb(unsigned int ptr)
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{
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return *((volatile unsigned char *)ptr);
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}
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static unsigned int __raw_readl(unsigned int ptr)
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{
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return *((volatile unsigned int *)ptr);
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}
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static void __raw_writeb(unsigned char value, unsigned int ptr)
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{
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*((volatile unsigned char *)ptr) = value;
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}
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static void __raw_writel(unsigned int value, unsigned int ptr)
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{
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*((volatile unsigned int *)ptr) = value;
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}
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#define PHYS_UART1_DATA 0x808c0000
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#define PHYS_UART1_FLAG 0x808c0018
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#define UART1_FLAG_TXFF 0x20
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static inline void putc(int c)
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{
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int i;
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for (i = 0; i < 1000; i++) {
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/* Transmit fifo not full? */
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if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
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break;
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}
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__raw_writeb(c, PHYS_UART1_DATA);
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}
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static inline void flush(void)
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{
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}
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/*
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* Some bootloaders don't turn off DMA from the ethernet MAC before
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* jumping to linux, which means that we might end up with bits of RX
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* status and packet data scribbled over the uncompressed kernel image.
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* Work around this by resetting the ethernet MAC before we uncompress.
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*/
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#define PHYS_ETH_SELF_CTL 0x80010020
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#define ETH_SELF_CTL_RESET 0x00000001
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static void ethernet_reset(void)
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{
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unsigned int v;
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/* Reset the ethernet MAC. */
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v = __raw_readl(PHYS_ETH_SELF_CTL);
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__raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
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/* Wait for reset to finish. */
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while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
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;
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}
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static void arch_decomp_setup(void)
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{
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ethernet_reset();
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}
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#define arch_decomp_wdog()
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