linux_dsm_epyc7002/include/uapi/rdma/qedr-abi.h
Amrani, Ram 67cbe3532c RDMA/qedr: notify user application of supported WIDs
The number of supported WIDs, if they are supported at all, can be
limited due to resources. Notifying the user space application the
number of available WIDs allows it to utilize them correctly.

Signed-off-by: Ram Amrani <Ram.Amrani@cavium.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-07-27 08:59:52 -04:00

110 lines
2.6 KiB
C

/* QLogic qedr NIC Driver
* Copyright (c) 2015-2016 QLogic Corporation
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and /or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef __QEDR_USER_H__
#define __QEDR_USER_H__
#include <linux/types.h>
#define QEDR_ABI_VERSION (8)
/* user kernel communication data structures. */
struct qedr_alloc_ucontext_resp {
__u64 db_pa;
__u32 db_size;
__u32 max_send_wr;
__u32 max_recv_wr;
__u32 max_srq_wr;
__u32 sges_per_send_wr;
__u32 sges_per_recv_wr;
__u32 sges_per_srq_wr;
__u32 max_cqes;
__u8 dpm_enabled;
__u8 wids_enabled;
__u16 wid_count;
};
struct qedr_alloc_pd_ureq {
__u64 rsvd1;
};
struct qedr_alloc_pd_uresp {
__u32 pd_id;
};
struct qedr_create_cq_ureq {
__u64 addr;
__u64 len;
};
struct qedr_create_cq_uresp {
__u32 db_offset;
__u16 icid;
};
struct qedr_create_qp_ureq {
__u32 qp_handle_hi;
__u32 qp_handle_lo;
/* SQ */
/* user space virtual address of SQ buffer */
__u64 sq_addr;
/* length of SQ buffer */
__u64 sq_len;
/* RQ */
/* user space virtual address of RQ buffer */
__u64 rq_addr;
/* length of RQ buffer */
__u64 rq_len;
};
struct qedr_create_qp_uresp {
__u32 qp_id;
__u32 atomic_supported;
/* SQ */
__u32 sq_db_offset;
__u16 sq_icid;
/* RQ */
__u32 rq_db_offset;
__u16 rq_icid;
__u32 rq_db2_offset;
};
#endif /* __QEDR_USER_H__ */