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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8e3d7c834b
There is intermittent cache coherency issue caught in toolchian tests. Revert to use flushd. Signed-off-by: Ley Foon Tan <lftan@altera.com>
270 lines
6.8 KiB
C
270 lines
6.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009, Wind River Systems Inc
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* Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
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*/
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#include <linux/export.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/fs.h>
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#include <asm/cacheflush.h>
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#include <asm/cpuinfo.h>
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static void __flush_dcache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(cpuinfo.dcache_line_size - 1);
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end += (cpuinfo.dcache_line_size - 1);
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end &= ~(cpuinfo.dcache_line_size - 1);
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if (end > start + cpuinfo.dcache_size)
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end = start + cpuinfo.dcache_size;
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for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) {
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__asm__ __volatile__ (" flushd 0(%0)\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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}
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static void __invalidate_dcache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(cpuinfo.dcache_line_size - 1);
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end += (cpuinfo.dcache_line_size - 1);
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end &= ~(cpuinfo.dcache_line_size - 1);
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for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) {
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__asm__ __volatile__ (" initda 0(%0)\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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}
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static void __flush_icache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(cpuinfo.icache_line_size - 1);
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end += (cpuinfo.icache_line_size - 1);
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end &= ~(cpuinfo.icache_line_size - 1);
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if (end > start + cpuinfo.icache_size)
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end = start + cpuinfo.icache_size;
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for (addr = start; addr < end; addr += cpuinfo.icache_line_size) {
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__asm__ __volatile__ (" flushi %0\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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__asm__ __volatile(" flushp\n");
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}
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static void flush_aliases(struct address_space *mapping, struct page *page)
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{
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struct mm_struct *mm = current->active_mm;
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struct vm_area_struct *mpnt;
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pgoff_t pgoff;
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pgoff = page->index;
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flush_dcache_mmap_lock(mapping);
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vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
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unsigned long offset;
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if (mpnt->vm_mm != mm)
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continue;
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if (!(mpnt->vm_flags & VM_MAYSHARE))
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continue;
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offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
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flush_cache_page(mpnt, mpnt->vm_start + offset,
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page_to_pfn(page));
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}
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flush_dcache_mmap_unlock(mapping);
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}
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void flush_cache_all(void)
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{
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__flush_dcache(0, cpuinfo.dcache_size);
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__flush_icache(0, cpuinfo.icache_size);
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}
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void flush_cache_mm(struct mm_struct *mm)
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{
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flush_cache_all();
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}
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void flush_cache_dup_mm(struct mm_struct *mm)
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{
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flush_cache_all();
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}
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void flush_icache_range(unsigned long start, unsigned long end)
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{
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__flush_dcache(start, end);
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__flush_icache(start, end);
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}
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void flush_dcache_range(unsigned long start, unsigned long end)
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{
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__flush_dcache(start, end);
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__flush_icache(start, end);
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}
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EXPORT_SYMBOL(flush_dcache_range);
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void invalidate_dcache_range(unsigned long start, unsigned long end)
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{
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__invalidate_dcache(start, end);
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}
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EXPORT_SYMBOL(invalidate_dcache_range);
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void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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__flush_dcache(start, end);
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if (vma == NULL || (vma->vm_flags & VM_EXEC))
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__flush_icache(start, end);
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}
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void flush_icache_page(struct vm_area_struct *vma, struct page *page)
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{
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unsigned long start = (unsigned long) page_address(page);
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unsigned long end = start + PAGE_SIZE;
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__flush_dcache(start, end);
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__flush_icache(start, end);
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}
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void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
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unsigned long pfn)
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{
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unsigned long start = vmaddr;
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unsigned long end = start + PAGE_SIZE;
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__flush_dcache(start, end);
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if (vma->vm_flags & VM_EXEC)
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__flush_icache(start, end);
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}
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void __flush_dcache_page(struct address_space *mapping, struct page *page)
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{
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/*
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* Writeback any data associated with the kernel mapping of this
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* page. This ensures that data in the physical page is mutually
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* coherent with the kernels mapping.
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*/
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unsigned long start = (unsigned long)page_address(page);
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__flush_dcache(start, start + PAGE_SIZE);
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}
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void flush_dcache_page(struct page *page)
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{
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struct address_space *mapping;
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/*
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* The zero page is never written to, so never has any dirty
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* cache lines, and therefore never needs to be flushed.
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*/
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if (page == ZERO_PAGE(0))
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return;
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mapping = page_mapping(page);
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/* Flush this page if there are aliases. */
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if (mapping && !mapping_mapped(mapping)) {
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clear_bit(PG_dcache_clean, &page->flags);
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} else {
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__flush_dcache_page(mapping, page);
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if (mapping) {
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unsigned long start = (unsigned long)page_address(page);
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flush_aliases(mapping, page);
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flush_icache_range(start, start + PAGE_SIZE);
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}
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set_bit(PG_dcache_clean, &page->flags);
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}
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}
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EXPORT_SYMBOL(flush_dcache_page);
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void update_mmu_cache(struct vm_area_struct *vma,
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unsigned long address, pte_t *pte)
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{
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unsigned long pfn = pte_pfn(*pte);
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struct page *page;
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struct address_space *mapping;
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if (!pfn_valid(pfn))
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return;
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/*
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* The zero page is never written to, so never has any dirty
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* cache lines, and therefore never needs to be flushed.
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*/
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page = pfn_to_page(pfn);
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if (page == ZERO_PAGE(0))
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return;
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mapping = page_mapping(page);
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if (!test_and_set_bit(PG_dcache_clean, &page->flags))
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__flush_dcache_page(mapping, page);
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if(mapping)
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{
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flush_aliases(mapping, page);
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if (vma->vm_flags & VM_EXEC)
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flush_icache_page(vma, page);
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}
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}
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void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
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struct page *to)
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{
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__flush_dcache(vaddr, vaddr + PAGE_SIZE);
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__flush_icache(vaddr, vaddr + PAGE_SIZE);
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copy_page(vto, vfrom);
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__flush_dcache((unsigned long)vto, (unsigned long)vto + PAGE_SIZE);
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__flush_icache((unsigned long)vto, (unsigned long)vto + PAGE_SIZE);
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}
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void clear_user_page(void *addr, unsigned long vaddr, struct page *page)
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{
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__flush_dcache(vaddr, vaddr + PAGE_SIZE);
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__flush_icache(vaddr, vaddr + PAGE_SIZE);
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clear_page(addr);
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__flush_dcache((unsigned long)addr, (unsigned long)addr + PAGE_SIZE);
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__flush_icache((unsigned long)addr, (unsigned long)addr + PAGE_SIZE);
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}
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void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long user_vaddr,
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void *dst, void *src, int len)
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{
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flush_cache_page(vma, user_vaddr, page_to_pfn(page));
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memcpy(dst, src, len);
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__flush_dcache((unsigned long)src, (unsigned long)src + len);
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if (vma->vm_flags & VM_EXEC)
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__flush_icache((unsigned long)src, (unsigned long)src + len);
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}
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long user_vaddr,
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void *dst, void *src, int len)
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{
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flush_cache_page(vma, user_vaddr, page_to_pfn(page));
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memcpy(dst, src, len);
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__flush_dcache((unsigned long)dst, (unsigned long)dst + len);
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if (vma->vm_flags & VM_EXEC)
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__flush_icache((unsigned long)dst, (unsigned long)dst + len);
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}
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