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Task switches can switch between Protected Mode and VM86. The current mode must be updated during the task switch emulation so that the new segment selectors are interpreted correctly. In order to let privilege checks succeed, rflags needs to be updated in the vcpu struct as this causes a CPL update. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
396 lines
13 KiB
C
396 lines
13 KiB
C
/******************************************************************************
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* x86_emulate.h
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*
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* Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
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*
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* Copyright (c) 2005 Keir Fraser
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*
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* From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
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*/
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#ifndef _ASM_X86_KVM_X86_EMULATE_H
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#define _ASM_X86_KVM_X86_EMULATE_H
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#include <asm/desc_defs.h>
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struct x86_emulate_ctxt;
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enum x86_intercept;
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enum x86_intercept_stage;
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struct x86_exception {
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u8 vector;
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bool error_code_valid;
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u16 error_code;
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bool nested_page_fault;
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u64 address; /* cr2 or nested page fault gpa */
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};
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/*
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* This struct is used to carry enough information from the instruction
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* decoder to main KVM so that a decision can be made whether the
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* instruction needs to be intercepted or not.
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*/
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struct x86_instruction_info {
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u8 intercept; /* which intercept */
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u8 rep_prefix; /* rep prefix? */
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u8 modrm_mod; /* mod part of modrm */
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u8 modrm_reg; /* index of register used */
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u8 modrm_rm; /* rm part of modrm */
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u64 src_val; /* value of source operand */
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u8 src_bytes; /* size of source operand */
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u8 dst_bytes; /* size of destination operand */
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u8 ad_bytes; /* size of src/dst address */
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u64 next_rip; /* rip following the instruction */
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};
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/*
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* x86_emulate_ops:
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*
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* These operations represent the instruction emulator's interface to memory.
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* There are two categories of operation: those that act on ordinary memory
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* regions (*_std), and those that act on memory regions known to require
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* special treatment or emulation (*_emulated).
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*
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* The emulator assumes that an instruction accesses only one 'emulated memory'
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* location, that this location is the given linear faulting address (cr2), and
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* that this is one of the instruction's data operands. Instruction fetches and
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* stack operations are assumed never to access emulated memory. The emulator
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* automatically deduces which operand of a string-move operation is accessing
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* emulated memory, and assumes that the other operand accesses normal memory.
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*
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* NOTES:
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* 1. The emulator isn't very smart about emulated vs. standard memory.
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* 'Emulated memory' access addresses should be checked for sanity.
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* 'Normal memory' accesses may fault, and the caller must arrange to
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* detect and handle reentrancy into the emulator via recursive faults.
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* Accesses may be unaligned and may cross page boundaries.
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* 2. If the access fails (cannot emulate, or a standard access faults) then
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* it is up to the memop to propagate the fault to the guest VM via
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* some out-of-band mechanism, unknown to the emulator. The memop signals
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* failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
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* then immediately bail.
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* 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
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* cmpxchg8b_emulated need support 8-byte accesses.
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* 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
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*/
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/* Access completed successfully: continue emulation as normal. */
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#define X86EMUL_CONTINUE 0
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/* Access is unhandleable: bail from emulation and return error to caller. */
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#define X86EMUL_UNHANDLEABLE 1
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/* Terminate emulation but return success to the caller. */
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#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
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#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
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#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
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#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
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#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
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struct x86_emulate_ops {
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/*
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* read_std: Read bytes of standard (non-emulated/special) memory.
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* Used for descriptor reading.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*read_std)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val,
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unsigned int bytes,
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struct x86_exception *fault);
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/*
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* write_std: Write bytes of standard (non-emulated/special) memory.
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* Used for descriptor writing.
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* @addr: [IN ] Linear address to which to write.
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* @val: [OUT] Value write to memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to write to memory.
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*/
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int (*write_std)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault);
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/*
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* fetch: Read bytes of standard (non-emulated/special) memory.
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* Used for instruction fetch.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*fetch)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault);
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/*
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* read_emulated: Read bytes from emulated/special memory area.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault);
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/*
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* write_emulated: Write bytes to emulated/special memory area.
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* @addr: [IN ] Linear address to which to write.
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* @val: [IN ] Value to write to memory (low-order bytes used as
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* required).
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* @bytes: [IN ] Number of bytes to write to memory.
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*/
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int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, const void *val,
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unsigned int bytes,
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struct x86_exception *fault);
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/*
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* cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
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* emulated/special memory area.
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* @addr: [IN ] Linear address to access.
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* @old: [IN ] Value expected to be current at @addr.
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* @new: [IN ] Value to write to @addr.
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* @bytes: [IN ] Number of bytes to access using CMPXCHG.
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*/
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int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr,
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const void *old,
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const void *new,
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unsigned int bytes,
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struct x86_exception *fault);
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void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
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int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
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int size, unsigned short port, void *val,
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unsigned int count);
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int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
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int size, unsigned short port, const void *val,
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unsigned int count);
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bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
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struct desc_struct *desc, u32 *base3, int seg);
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void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
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struct desc_struct *desc, u32 base3, int seg);
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unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
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int seg);
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void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
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int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
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void (*set_rflags)(struct x86_emulate_ctxt *ctxt, ulong val);
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int (*cpl)(struct x86_emulate_ctxt *ctxt);
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int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
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int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
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int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
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int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
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void (*halt)(struct x86_emulate_ctxt *ctxt);
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void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
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int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
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void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */
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void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */
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int (*intercept)(struct x86_emulate_ctxt *ctxt,
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struct x86_instruction_info *info,
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enum x86_intercept_stage stage);
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bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt,
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u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
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};
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typedef u32 __attribute__((vector_size(16))) sse128_t;
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/* Type, address-of, and value of an instruction's operand. */
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struct operand {
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enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_NONE } type;
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unsigned int bytes;
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union {
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unsigned long orig_val;
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u64 orig_val64;
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};
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union {
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unsigned long *reg;
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struct segmented_address {
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ulong ea;
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unsigned seg;
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} mem;
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unsigned xmm;
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} addr;
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union {
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unsigned long val;
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u64 val64;
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char valptr[sizeof(unsigned long) + 2];
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sse128_t vec_val;
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};
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};
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struct fetch_cache {
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u8 data[15];
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unsigned long start;
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unsigned long end;
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};
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struct read_cache {
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u8 data[1024];
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unsigned long pos;
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unsigned long end;
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};
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struct x86_emulate_ctxt {
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struct x86_emulate_ops *ops;
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/* Register state before/after emulation. */
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unsigned long eflags;
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unsigned long eip; /* eip before instruction emulation */
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/* Emulated execution mode, represented by an X86EMUL_MODE value. */
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int mode;
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/* interruptibility state, as a result of execution of STI or MOV SS */
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int interruptibility;
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bool guest_mode; /* guest running a nested guest */
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bool perm_ok; /* do not check permissions if true */
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bool only_vendor_specific_insn;
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bool have_exception;
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struct x86_exception exception;
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/* decode cache */
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u8 twobyte;
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u8 b;
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u8 intercept;
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u8 lock_prefix;
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u8 rep_prefix;
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u8 op_bytes;
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u8 ad_bytes;
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u8 rex_prefix;
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struct operand src;
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struct operand src2;
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struct operand dst;
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bool has_seg_override;
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u8 seg_override;
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u64 d;
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int (*execute)(struct x86_emulate_ctxt *ctxt);
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int (*check_perm)(struct x86_emulate_ctxt *ctxt);
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/* modrm */
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u8 modrm;
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u8 modrm_mod;
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u8 modrm_reg;
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u8 modrm_rm;
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u8 modrm_seg;
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bool rip_relative;
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unsigned long _eip;
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/* Fields above regs are cleared together. */
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unsigned long regs[NR_VCPU_REGS];
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struct operand memop;
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struct operand *memopp;
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struct fetch_cache fetch;
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struct read_cache io_read;
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struct read_cache mem_read;
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};
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/* Repeat String Operation Prefix */
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#define REPE_PREFIX 0xf3
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#define REPNE_PREFIX 0xf2
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/* Execution mode, passed to the emulator. */
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#define X86EMUL_MODE_REAL 0 /* Real mode. */
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#define X86EMUL_MODE_VM86 1 /* Virtual 8086 mode. */
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#define X86EMUL_MODE_PROT16 2 /* 16-bit protected mode. */
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#define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */
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#define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */
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/* any protected mode */
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#define X86EMUL_MODE_PROT (X86EMUL_MODE_PROT16|X86EMUL_MODE_PROT32| \
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X86EMUL_MODE_PROT64)
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/* CPUID vendors */
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#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
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#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
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#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
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#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
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#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
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#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
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#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
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#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
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#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
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enum x86_intercept_stage {
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X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
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X86_ICPT_PRE_EXCEPT,
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X86_ICPT_POST_EXCEPT,
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X86_ICPT_POST_MEMACCESS,
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};
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enum x86_intercept {
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x86_intercept_none,
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x86_intercept_cr_read,
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x86_intercept_cr_write,
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x86_intercept_clts,
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x86_intercept_lmsw,
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x86_intercept_smsw,
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x86_intercept_dr_read,
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x86_intercept_dr_write,
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x86_intercept_lidt,
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x86_intercept_sidt,
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x86_intercept_lgdt,
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x86_intercept_sgdt,
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x86_intercept_lldt,
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x86_intercept_sldt,
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x86_intercept_ltr,
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x86_intercept_str,
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x86_intercept_rdtsc,
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x86_intercept_rdpmc,
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x86_intercept_pushf,
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x86_intercept_popf,
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x86_intercept_cpuid,
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x86_intercept_rsm,
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x86_intercept_iret,
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x86_intercept_intn,
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x86_intercept_invd,
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x86_intercept_pause,
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x86_intercept_hlt,
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x86_intercept_invlpg,
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x86_intercept_invlpga,
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x86_intercept_vmrun,
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x86_intercept_vmload,
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x86_intercept_vmsave,
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x86_intercept_vmmcall,
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x86_intercept_stgi,
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x86_intercept_clgi,
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x86_intercept_skinit,
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x86_intercept_rdtscp,
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x86_intercept_icebp,
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x86_intercept_wbinvd,
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x86_intercept_monitor,
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x86_intercept_mwait,
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x86_intercept_rdmsr,
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x86_intercept_wrmsr,
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x86_intercept_in,
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x86_intercept_ins,
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x86_intercept_out,
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x86_intercept_outs,
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nr_x86_intercepts
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};
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/* Host execution mode. */
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#if defined(CONFIG_X86_32)
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#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
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#elif defined(CONFIG_X86_64)
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#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
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#endif
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int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
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bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
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#define EMULATION_FAILED -1
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#define EMULATION_OK 0
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#define EMULATION_RESTART 1
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#define EMULATION_INTERCEPTED 2
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int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
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int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
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u16 tss_selector, int idt_index, int reason,
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bool has_error_code, u32 error_code);
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int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
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#endif /* _ASM_X86_KVM_X86_EMULATE_H */
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