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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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137436c9a6
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional steps to handle the P/Q bits in IVE before EOIing the corresponding interrupt. The patch changes the EOI handler to cover that. we have individual IRQ chip in each PHB instance. During the MSI IRQ setup time, the IRQ chip is copied over from the original one for that IRQ, and the EOI handler is patched with the one that will handle the P/Q bits (As Ben suggested). Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
111 lines
4.3 KiB
ArmAsm
111 lines
4.3 KiB
ArmAsm
/*
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* PowerNV OPAL API wrappers
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/hvcall.h>
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#include <asm/asm-offsets.h>
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#include <asm/opal.h>
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/* TODO:
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*
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* - Trace irqs in/off (needs saving/restoring all args, argh...)
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* - Get r11 feed up by Dave so I can have better register usage
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*/
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#define OPAL_CALL(name, token) \
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_GLOBAL(name); \
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mflr r0; \
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mfcr r12; \
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std r0,16(r1); \
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std r12,8(r1); \
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std r1,PACAR1(r13); \
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li r0,0; \
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mfmsr r12; \
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ori r0,r0,MSR_EE; \
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std r12,PACASAVEDMSR(r13); \
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andc r12,r12,r0; \
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mtmsrd r12,1; \
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LOAD_REG_ADDR(r0,.opal_return); \
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mtlr r0; \
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li r0,MSR_DR|MSR_IR; \
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andc r12,r12,r0; \
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li r0,token; \
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mtspr SPRN_HSRR1,r12; \
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LOAD_REG_ADDR(r11,opal); \
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ld r12,8(r11); \
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ld r2,0(r11); \
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mtspr SPRN_HSRR0,r12; \
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hrfid
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_STATIC(opal_return)
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ld r2,PACATOC(r13);
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ld r4,8(r1);
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ld r5,16(r1);
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ld r6,PACASAVEDMSR(r13);
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mtspr SPRN_SRR0,r5;
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mtspr SPRN_SRR1,r6;
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mtcr r4;
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rfid
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OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE);
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OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ);
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OPAL_CALL(opal_console_write_buffer_space, OPAL_CONSOLE_WRITE_BUFFER_SPACE);
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OPAL_CALL(opal_rtc_read, OPAL_RTC_READ);
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OPAL_CALL(opal_rtc_write, OPAL_RTC_WRITE);
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OPAL_CALL(opal_cec_power_down, OPAL_CEC_POWER_DOWN);
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OPAL_CALL(opal_cec_reboot, OPAL_CEC_REBOOT);
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OPAL_CALL(opal_read_nvram, OPAL_READ_NVRAM);
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OPAL_CALL(opal_write_nvram, OPAL_WRITE_NVRAM);
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OPAL_CALL(opal_handle_interrupt, OPAL_HANDLE_INTERRUPT);
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OPAL_CALL(opal_poll_events, OPAL_POLL_EVENTS);
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OPAL_CALL(opal_pci_set_hub_tce_memory, OPAL_PCI_SET_HUB_TCE_MEMORY);
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OPAL_CALL(opal_pci_set_phb_tce_memory, OPAL_PCI_SET_PHB_TCE_MEMORY);
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OPAL_CALL(opal_pci_config_read_byte, OPAL_PCI_CONFIG_READ_BYTE);
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OPAL_CALL(opal_pci_config_read_half_word, OPAL_PCI_CONFIG_READ_HALF_WORD);
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OPAL_CALL(opal_pci_config_read_word, OPAL_PCI_CONFIG_READ_WORD);
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OPAL_CALL(opal_pci_config_write_byte, OPAL_PCI_CONFIG_WRITE_BYTE);
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OPAL_CALL(opal_pci_config_write_half_word, OPAL_PCI_CONFIG_WRITE_HALF_WORD);
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OPAL_CALL(opal_pci_config_write_word, OPAL_PCI_CONFIG_WRITE_WORD);
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OPAL_CALL(opal_set_xive, OPAL_SET_XIVE);
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OPAL_CALL(opal_get_xive, OPAL_GET_XIVE);
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OPAL_CALL(opal_register_exception_handler, OPAL_REGISTER_OPAL_EXCEPTION_HANDLER);
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OPAL_CALL(opal_pci_eeh_freeze_status, OPAL_PCI_EEH_FREEZE_STATUS);
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OPAL_CALL(opal_pci_eeh_freeze_clear, OPAL_PCI_EEH_FREEZE_CLEAR);
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OPAL_CALL(opal_pci_shpc, OPAL_PCI_SHPC);
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OPAL_CALL(opal_pci_phb_mmio_enable, OPAL_PCI_PHB_MMIO_ENABLE);
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OPAL_CALL(opal_pci_set_phb_mem_window, OPAL_PCI_SET_PHB_MEM_WINDOW);
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OPAL_CALL(opal_pci_map_pe_mmio_window, OPAL_PCI_MAP_PE_MMIO_WINDOW);
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OPAL_CALL(opal_pci_set_phb_table_memory, OPAL_PCI_SET_PHB_TABLE_MEMORY);
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OPAL_CALL(opal_pci_set_pe, OPAL_PCI_SET_PE);
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OPAL_CALL(opal_pci_set_peltv, OPAL_PCI_SET_PELTV);
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OPAL_CALL(opal_pci_set_mve, OPAL_PCI_SET_MVE);
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OPAL_CALL(opal_pci_set_mve_enable, OPAL_PCI_SET_MVE_ENABLE);
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OPAL_CALL(opal_pci_get_xive_reissue, OPAL_PCI_GET_XIVE_REISSUE);
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OPAL_CALL(opal_pci_set_xive_reissue, OPAL_PCI_SET_XIVE_REISSUE);
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OPAL_CALL(opal_pci_set_xive_pe, OPAL_PCI_SET_XIVE_PE);
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OPAL_CALL(opal_get_xive_source, OPAL_GET_XIVE_SOURCE);
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OPAL_CALL(opal_get_msi_32, OPAL_GET_MSI_32);
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OPAL_CALL(opal_get_msi_64, OPAL_GET_MSI_64);
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OPAL_CALL(opal_start_cpu, OPAL_START_CPU);
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OPAL_CALL(opal_query_cpu_status, OPAL_QUERY_CPU_STATUS);
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OPAL_CALL(opal_write_oppanel, OPAL_WRITE_OPPANEL);
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OPAL_CALL(opal_pci_map_pe_dma_window, OPAL_PCI_MAP_PE_DMA_WINDOW);
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OPAL_CALL(opal_pci_map_pe_dma_window_real, OPAL_PCI_MAP_PE_DMA_WINDOW_REAL);
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OPAL_CALL(opal_pci_reset, OPAL_PCI_RESET);
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OPAL_CALL(opal_pci_get_hub_diag_data, OPAL_PCI_GET_HUB_DIAG_DATA);
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OPAL_CALL(opal_pci_get_phb_diag_data, OPAL_PCI_GET_PHB_DIAG_DATA);
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OPAL_CALL(opal_pci_fence_phb, OPAL_PCI_FENCE_PHB);
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OPAL_CALL(opal_pci_reinit, OPAL_PCI_REINIT);
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OPAL_CALL(opal_pci_mask_pe_error, OPAL_PCI_MASK_PE_ERROR);
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OPAL_CALL(opal_set_slot_led_status, OPAL_SET_SLOT_LED_STATUS);
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OPAL_CALL(opal_get_epow_status, OPAL_GET_EPOW_STATUS);
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OPAL_CALL(opal_set_system_attention_led, OPAL_SET_SYSTEM_ATTENTION_LED);
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OPAL_CALL(opal_pci_msi_eoi, OPAL_PCI_MSI_EOI);
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