Marc Zyngier 505287525c irqchip/gic-v3: Add support for Message Based Interrupts as an MSI controller ... GICv3 offers the possibility to signal SPIs using a pair of doorbells (SETPI, CLRSPI) under the name of Message Based Interrupts (MBI). They can be used as either traditional (edge) MSIs, or the more exotic level-triggered flavour. Let's implement support for platform MSI, which is the original intent for this feature. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20180508121438.11301-8-marc.zyngier@arm.com		2018-05-13 15:59:01 +02:00
..
arm-gic-common.h	irqchip/gic-v3: Advertise GICv4 support to KVM	2017-08-31 15:31:42 +01:00
arm-gic-v3.h	irqchip/gic-v3: Add support for Message Based Interrupts as an MSI controller	2018-05-13 15:59:01 +02:00
arm-gic-v4.h	irqchip/gic-v4: Add forward definition of struct irq_domain_ops	2017-11-13 16:21:33 +00:00
arm-gic.h	KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid	2018-03-14 18:31:04 +00:00
arm-vic.h
chained_irq.h
ingenic.h	MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchip	2015-06-21 21:53:10 +02:00
irq-bcm2836.h	irqchip: bcm2836: Move SMP startup code to arch/arm (v2)	2017-09-25 11:52:26 -07:00
irq-omap-intc.h	irqchip/irq-omap-intc: Remove omap3_init_irq()	2017-10-16 21:05:14 +02:00
irq-partition-percpu.h	irqchip: Add per-cpu interrupt partitioning library	2016-05-02 13:42:51 +02:00
irq-sa11x0.h
mmp.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
mxs.h
versatile-fpga.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
xtensa-mx.h
xtensa-pic.h