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ea7bdc65bc
apic_icr_write() and its users in smpboot.c were apparently written under the assumption that this code would only run during early boot. But nowadays we also execute it when onlining a CPU later on while the system is fully running. That will make wakeup_cpu_via_init_nmi and, thus, also native_apic_icr_write run in plain process context. If we migrate the caller to a different CPU at the wrong time or interrupt it and write to ICR/ICR2 to send unrelated IPIs, we can end up sending INIT, SIPI or NMIs to wrong CPUs. Fix this by disabling interrupts during the write to the ICR halves and disable preemption around waiting for ICR availability and using it. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-By: Igor Mammedov <imammedo@redhat.com> Link: http://lkml.kernel.org/r/52E6AFFE.3030004@siemens.com Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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.. | ||
apic_flat_64.c | ||
apic_noop.c | ||
apic_numachip.c | ||
apic.c | ||
bigsmp_32.c | ||
es7000_32.c | ||
hw_nmi.c | ||
io_apic.c | ||
ipi.c | ||
Makefile | ||
numaq_32.c | ||
probe_32.c | ||
probe_64.c | ||
summit_32.c | ||
x2apic_cluster.c | ||
x2apic_phys.c | ||
x2apic_uv_x.c |