mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 12:55:09 +07:00
579a25a854
Adds the initial hooks for TBS support. This needs a 32 byte descriptor in order for it to work with current HW. Adds all the logic for Enhanced Descriptors in main core but no HW related logic for now. Changes from v2: - Use bitfield for TBS status / support (Jakub) - Remove unneeded cache alignment (Jakub) - Fix checkpatch issues Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
291 lines
6.5 KiB
C
291 lines
6.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*******************************************************************************
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#ifndef __STMMAC_H__
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#define __STMMAC_H__
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#define STMMAC_RESOURCE_NAME "stmmaceth"
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#define DRV_MODULE_VERSION "Jan_2016"
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#include <linux/clk.h>
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#include <linux/if_vlan.h>
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#include <linux/stmmac.h>
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#include <linux/phylink.h>
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#include <linux/pci.h>
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#include "common.h"
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#include <linux/ptp_clock_kernel.h>
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#include <linux/net_tstamp.h>
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#include <linux/reset.h>
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#include <net/page_pool.h>
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struct stmmac_resources {
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void __iomem *addr;
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const char *mac;
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int wol_irq;
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int lpi_irq;
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int irq;
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};
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struct stmmac_tx_info {
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dma_addr_t buf;
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bool map_as_page;
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unsigned len;
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bool last_segment;
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bool is_jumbo;
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};
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#define STMMAC_TBS_AVAIL BIT(0)
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#define STMMAC_TBS_EN BIT(1)
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/* Frequently used values are kept adjacent for cache effect */
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struct stmmac_tx_queue {
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u32 tx_count_frames;
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int tbs;
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struct timer_list txtimer;
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u32 queue_index;
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struct stmmac_priv *priv_data;
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struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
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struct dma_edesc *dma_entx;
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struct dma_desc *dma_tx;
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struct sk_buff **tx_skbuff;
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struct stmmac_tx_info *tx_skbuff_dma;
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unsigned int cur_tx;
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unsigned int dirty_tx;
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dma_addr_t dma_tx_phy;
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u32 tx_tail_addr;
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u32 mss;
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};
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struct stmmac_rx_buffer {
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struct page *page;
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struct page *sec_page;
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dma_addr_t addr;
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dma_addr_t sec_addr;
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};
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struct stmmac_rx_queue {
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u32 rx_count_frames;
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u32 queue_index;
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struct page_pool *page_pool;
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struct stmmac_rx_buffer *buf_pool;
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struct stmmac_priv *priv_data;
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struct dma_extended_desc *dma_erx;
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struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
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unsigned int cur_rx;
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unsigned int dirty_rx;
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u32 rx_zeroc_thresh;
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dma_addr_t dma_rx_phy;
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u32 rx_tail_addr;
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unsigned int state_saved;
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struct {
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struct sk_buff *skb;
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unsigned int len;
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unsigned int error;
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} state;
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};
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struct stmmac_channel {
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struct napi_struct rx_napi ____cacheline_aligned_in_smp;
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struct napi_struct tx_napi ____cacheline_aligned_in_smp;
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struct stmmac_priv *priv_data;
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spinlock_t lock;
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u32 index;
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};
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struct stmmac_tc_entry {
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bool in_use;
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bool in_hw;
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bool is_last;
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bool is_frag;
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void *frag_ptr;
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unsigned int table_pos;
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u32 handle;
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u32 prio;
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struct {
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u32 match_data;
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u32 match_en;
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u8 af:1;
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u8 rf:1;
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u8 im:1;
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u8 nc:1;
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u8 res1:4;
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u8 frame_offset;
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u8 ok_index;
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u8 dma_ch_no;
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u32 res2;
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} __packed val;
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};
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#define STMMAC_PPS_MAX 4
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struct stmmac_pps_cfg {
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bool available;
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struct timespec64 start;
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struct timespec64 period;
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};
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struct stmmac_rss {
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int enable;
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u8 key[STMMAC_RSS_HASH_KEY_SIZE];
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u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
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};
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#define STMMAC_FLOW_ACTION_DROP BIT(0)
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struct stmmac_flow_entry {
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unsigned long cookie;
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unsigned long action;
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u8 ip_proto;
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int in_use;
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int idx;
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int is_l4;
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};
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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u32 tx_coal_frames;
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u32 tx_coal_timer;
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u32 rx_coal_frames;
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int tx_coalesce;
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int hwts_tx_en;
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bool tx_path_in_lpi_mode;
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bool tso;
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int sph;
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u32 sarc_type;
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unsigned int dma_buf_sz;
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unsigned int rx_copybreak;
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u32 rx_riwt;
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int hwts_rx_en;
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void __iomem *ioaddr;
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struct net_device *dev;
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struct device *device;
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struct mac_device_info *hw;
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int (*hwif_quirks)(struct stmmac_priv *priv);
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struct mutex lock;
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/* RX Queue */
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struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
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/* TX Queue */
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struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
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/* Generic channel for NAPI */
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struct stmmac_channel channel[STMMAC_CH_MAX];
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int speed;
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unsigned int flow_ctrl;
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unsigned int pause;
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struct mii_bus *mii;
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int mii_irq[PHY_MAX_ADDR];
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struct phylink_config phylink_config;
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struct phylink *phylink;
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struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
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struct stmmac_safety_stats sstats;
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struct plat_stmmacenet_data *plat;
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struct dma_features dma_cap;
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struct stmmac_counters mmc;
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int hw_cap_support;
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int synopsys_id;
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u32 msg_enable;
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int wolopts;
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int wol_irq;
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int clk_csr;
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struct timer_list eee_ctrl_timer;
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int lpi_irq;
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int eee_enabled;
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int eee_active;
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int tx_lpi_timer;
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unsigned int mode;
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unsigned int chain_mode;
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int extend_desc;
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struct hwtstamp_config tstamp_config;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_ops;
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unsigned int default_addend;
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u32 sub_second_inc;
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u32 systime_flags;
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u32 adv_ts;
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int use_riwt;
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int irq_wake;
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spinlock_t ptp_lock;
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void __iomem *mmcaddr;
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void __iomem *ptpaddr;
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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#ifdef CONFIG_DEBUG_FS
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struct dentry *dbgfs_dir;
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#endif
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unsigned long state;
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struct workqueue_struct *wq;
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struct work_struct service_task;
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/* TC Handling */
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unsigned int tc_entries_max;
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unsigned int tc_off_max;
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struct stmmac_tc_entry *tc_entries;
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unsigned int flow_entries_max;
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struct stmmac_flow_entry *flow_entries;
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/* Pulse Per Second output */
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struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
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/* Receive Side Scaling */
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struct stmmac_rss rss;
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};
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enum stmmac_state {
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STMMAC_DOWN,
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STMMAC_RESET_REQUESTED,
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STMMAC_RESETING,
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STMMAC_SERVICE_SCHED,
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};
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int stmmac_mdio_unregister(struct net_device *ndev);
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int stmmac_mdio_register(struct net_device *ndev);
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int stmmac_mdio_reset(struct mii_bus *mii);
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void stmmac_set_ethtool_ops(struct net_device *netdev);
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void stmmac_ptp_register(struct stmmac_priv *priv);
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void stmmac_ptp_unregister(struct stmmac_priv *priv);
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int stmmac_resume(struct device *dev);
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int stmmac_suspend(struct device *dev);
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int stmmac_dvr_remove(struct device *dev);
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int stmmac_dvr_probe(struct device *device,
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struct plat_stmmacenet_data *plat_dat,
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struct stmmac_resources *res);
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void stmmac_disable_eee_mode(struct stmmac_priv *priv);
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bool stmmac_eee_init(struct stmmac_priv *priv);
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#if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
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void stmmac_selftest_run(struct net_device *dev,
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struct ethtool_test *etest, u64 *buf);
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void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
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int stmmac_selftest_get_count(struct stmmac_priv *priv);
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#else
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static inline void stmmac_selftest_run(struct net_device *dev,
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struct ethtool_test *etest, u64 *buf)
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{
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/* Not enabled */
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}
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static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
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u8 *data)
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{
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/* Not enabled */
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}
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static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
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{
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return -EOPNOTSUPP;
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}
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#endif /* CONFIG_STMMAC_SELFTESTS */
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#endif /* __STMMAC_H__ */
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