mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 22:36:40 +07:00
fd098316ef
As suggested by Stephen Rothwell. Signed-off-by: David S. Miller <davem@davemloft.net>
1578 lines
37 KiB
C
1578 lines
37 KiB
C
/*
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* su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
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*
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* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
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* Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
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*
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* This is mainly a variation of 8250.c, credits go to authors mentioned
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* therein. In fact this driver should be merged into the generic 8250.c
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* infrastructure perhaps using a 8250_sparc.c module.
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*
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* Fixed to use tty_get_baud_rate().
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* Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
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*
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* Converted to new 2.5.x UART layer.
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* David S. Miller (davem@davemloft.net), 2002-Jul-29
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/major.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/circ_buf.h>
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#include <linux/serial.h>
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#include <linux/sysrq.h>
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#include <linux/console.h>
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#ifdef CONFIG_SERIO
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#include <linux/serio.h>
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#endif
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#include <linux/serial_reg.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/of_device.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/prom.h>
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#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/serial_core.h>
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#include "suncore.h"
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/* We are on a NS PC87303 clocked with 24.0 MHz, which results
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* in a UART clock of 1.8462 MHz.
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*/
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#define SU_BASE_BAUD (1846200 / 16)
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enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
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static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
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/*
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* Here we define the default xmit fifo size used for each type of UART.
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*/
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static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
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{ "unknown", 1, 0 },
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{ "8250", 1, 0 },
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{ "16450", 1, 0 },
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{ "16550", 1, 0 },
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{ "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
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{ "Cirrus", 1, 0 },
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{ "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
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{ "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
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{ "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
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{ "Startech", 1, 0 },
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{ "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
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{ "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
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{ "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
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{ "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
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};
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struct uart_sunsu_port {
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struct uart_port port;
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unsigned char acr;
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unsigned char ier;
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unsigned short rev;
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unsigned char lcr;
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unsigned int lsr_break_flag;
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unsigned int cflag;
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/* Probing information. */
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enum su_type su_type;
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unsigned int type_probed; /* XXX Stupid */
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unsigned long reg_size;
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#ifdef CONFIG_SERIO
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struct serio serio;
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int serio_open;
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#endif
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};
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static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
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{
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offset <<= up->port.regshift;
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switch (up->port.iotype) {
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case UPIO_HUB6:
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outb(up->port.hub6 - 1 + offset, up->port.iobase);
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return inb(up->port.iobase + 1);
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case UPIO_MEM:
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return readb(up->port.membase + offset);
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default:
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return inb(up->port.iobase + offset);
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}
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}
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static void serial_out(struct uart_sunsu_port *up, int offset, int value)
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{
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#ifndef CONFIG_SPARC64
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/*
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* MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
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* connected with a gate then go to SlavIO. When IRQ4 goes tristated
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* gate outputs a logical one. Since we use level triggered interrupts
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* we have lockup and watchdog reset. We cannot mask IRQ because
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* keyboard shares IRQ with us (Word has it as Bob Smelik's design).
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* This problem is similar to what Alpha people suffer, see serial.c.
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*/
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if (offset == UART_MCR)
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value |= UART_MCR_OUT2;
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#endif
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offset <<= up->port.regshift;
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switch (up->port.iotype) {
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case UPIO_HUB6:
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outb(up->port.hub6 - 1 + offset, up->port.iobase);
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outb(value, up->port.iobase + 1);
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break;
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case UPIO_MEM:
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writeb(value, up->port.membase + offset);
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break;
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default:
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outb(value, up->port.iobase + offset);
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}
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}
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/*
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* We used to support using pause I/O for certain machines. We
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* haven't supported this for a while, but just in case it's badly
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* needed for certain old 386 machines, I've left these #define's
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* in....
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*/
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#define serial_inp(up, offset) serial_in(up, offset)
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#define serial_outp(up, offset, value) serial_out(up, offset, value)
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/*
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* For the 16C950
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*/
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static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
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{
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serial_out(up, UART_SCR, offset);
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serial_out(up, UART_ICR, value);
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}
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#if 0 /* Unused currently */
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static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
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{
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unsigned int value;
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serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
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serial_out(up, UART_SCR, offset);
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value = serial_in(up, UART_ICR);
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serial_icr_write(up, UART_ACR, up->acr);
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return value;
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}
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#endif
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#ifdef CONFIG_SERIAL_8250_RSA
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/*
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* Attempts to turn on the RSA FIFO. Returns zero on failure.
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* We set the port uart clock rate if we succeed.
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*/
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static int __enable_rsa(struct uart_sunsu_port *up)
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{
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unsigned char mode;
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int result;
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mode = serial_inp(up, UART_RSA_MSR);
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result = mode & UART_RSA_MSR_FIFO;
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if (!result) {
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serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
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mode = serial_inp(up, UART_RSA_MSR);
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result = mode & UART_RSA_MSR_FIFO;
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}
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if (result)
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up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
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return result;
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}
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static void enable_rsa(struct uart_sunsu_port *up)
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{
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if (up->port.type == PORT_RSA) {
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if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
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spin_lock_irq(&up->port.lock);
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__enable_rsa(up);
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spin_unlock_irq(&up->port.lock);
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}
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if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
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serial_outp(up, UART_RSA_FRR, 0);
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}
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}
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/*
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* Attempts to turn off the RSA FIFO. Returns zero on failure.
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* It is unknown why interrupts were disabled in here. However,
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* the caller is expected to preserve this behaviour by grabbing
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* the spinlock before calling this function.
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*/
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static void disable_rsa(struct uart_sunsu_port *up)
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{
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unsigned char mode;
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int result;
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if (up->port.type == PORT_RSA &&
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up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
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spin_lock_irq(&up->port.lock);
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mode = serial_inp(up, UART_RSA_MSR);
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result = !(mode & UART_RSA_MSR_FIFO);
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if (!result) {
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serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
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mode = serial_inp(up, UART_RSA_MSR);
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result = !(mode & UART_RSA_MSR_FIFO);
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}
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if (result)
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up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
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spin_unlock_irq(&up->port.lock);
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}
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}
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#endif /* CONFIG_SERIAL_8250_RSA */
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static inline void __stop_tx(struct uart_sunsu_port *p)
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{
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if (p->ier & UART_IER_THRI) {
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p->ier &= ~UART_IER_THRI;
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serial_out(p, UART_IER, p->ier);
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}
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}
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static void sunsu_stop_tx(struct uart_port *port)
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{
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struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
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__stop_tx(up);
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/*
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* We really want to stop the transmitter from sending.
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*/
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if (up->port.type == PORT_16C950) {
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up->acr |= UART_ACR_TXDIS;
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serial_icr_write(up, UART_ACR, up->acr);
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}
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}
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static void sunsu_start_tx(struct uart_port *port)
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{
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struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
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if (!(up->ier & UART_IER_THRI)) {
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up->ier |= UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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}
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/*
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* Re-enable the transmitter if we disabled it.
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*/
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if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
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up->acr &= ~UART_ACR_TXDIS;
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serial_icr_write(up, UART_ACR, up->acr);
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}
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}
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static void sunsu_stop_rx(struct uart_port *port)
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{
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struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
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up->ier &= ~UART_IER_RLSI;
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up->port.read_status_mask &= ~UART_LSR_DR;
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serial_out(up, UART_IER, up->ier);
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}
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static void sunsu_enable_ms(struct uart_port *port)
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{
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struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
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unsigned long flags;
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spin_lock_irqsave(&up->port.lock, flags);
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up->ier |= UART_IER_MSI;
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serial_out(up, UART_IER, up->ier);
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spin_unlock_irqrestore(&up->port.lock, flags);
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}
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static struct tty_struct *
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receive_chars(struct uart_sunsu_port *up, unsigned char *status)
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{
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struct tty_struct *tty = up->port.info->port.tty;
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unsigned char ch, flag;
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int max_count = 256;
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int saw_console_brk = 0;
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do {
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ch = serial_inp(up, UART_RX);
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flag = TTY_NORMAL;
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up->port.icount.rx++;
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if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
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UART_LSR_FE | UART_LSR_OE))) {
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/*
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* For statistics only
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*/
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if (*status & UART_LSR_BI) {
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*status &= ~(UART_LSR_FE | UART_LSR_PE);
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up->port.icount.brk++;
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if (up->port.cons != NULL &&
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up->port.line == up->port.cons->index)
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saw_console_brk = 1;
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/*
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* We do the SysRQ and SAK checking
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* here because otherwise the break
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* may get masked by ignore_status_mask
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* or read_status_mask.
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*/
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if (uart_handle_break(&up->port))
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goto ignore_char;
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} else if (*status & UART_LSR_PE)
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up->port.icount.parity++;
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else if (*status & UART_LSR_FE)
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up->port.icount.frame++;
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if (*status & UART_LSR_OE)
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up->port.icount.overrun++;
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/*
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* Mask off conditions which should be ingored.
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*/
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*status &= up->port.read_status_mask;
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if (up->port.cons != NULL &&
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up->port.line == up->port.cons->index) {
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/* Recover the break flag from console xmit */
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*status |= up->lsr_break_flag;
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up->lsr_break_flag = 0;
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}
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if (*status & UART_LSR_BI) {
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flag = TTY_BREAK;
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} else if (*status & UART_LSR_PE)
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flag = TTY_PARITY;
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else if (*status & UART_LSR_FE)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(&up->port, ch))
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goto ignore_char;
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if ((*status & up->port.ignore_status_mask) == 0)
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tty_insert_flip_char(tty, ch, flag);
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if (*status & UART_LSR_OE)
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/*
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* Overrun is special, since it's reported
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* immediately, and doesn't affect the current
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* character.
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*/
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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ignore_char:
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*status = serial_inp(up, UART_LSR);
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} while ((*status & UART_LSR_DR) && (max_count-- > 0));
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if (saw_console_brk)
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sun_do_break();
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return tty;
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}
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static void transmit_chars(struct uart_sunsu_port *up)
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{
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struct circ_buf *xmit = &up->port.info->xmit;
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int count;
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if (up->port.x_char) {
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serial_outp(up, UART_TX, up->port.x_char);
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up->port.icount.tx++;
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up->port.x_char = 0;
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return;
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}
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if (uart_tx_stopped(&up->port)) {
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sunsu_stop_tx(&up->port);
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return;
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}
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if (uart_circ_empty(xmit)) {
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__stop_tx(up);
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return;
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}
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count = up->port.fifosize;
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do {
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serial_out(up, UART_TX, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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up->port.icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&up->port);
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if (uart_circ_empty(xmit))
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__stop_tx(up);
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}
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|
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static void check_modem_status(struct uart_sunsu_port *up)
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{
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int status;
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status = serial_in(up, UART_MSR);
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if ((status & UART_MSR_ANY_DELTA) == 0)
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return;
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if (status & UART_MSR_TERI)
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up->port.icount.rng++;
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if (status & UART_MSR_DDSR)
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up->port.icount.dsr++;
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if (status & UART_MSR_DDCD)
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uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
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if (status & UART_MSR_DCTS)
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uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
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wake_up_interruptible(&up->port.info->delta_msr_wait);
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}
|
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static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
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{
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struct uart_sunsu_port *up = dev_id;
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unsigned long flags;
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unsigned char status;
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spin_lock_irqsave(&up->port.lock, flags);
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do {
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struct tty_struct *tty;
|
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|
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status = serial_inp(up, UART_LSR);
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tty = NULL;
|
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if (status & UART_LSR_DR)
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tty = receive_chars(up, &status);
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check_modem_status(up);
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if (status & UART_LSR_THRE)
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transmit_chars(up);
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spin_unlock_irqrestore(&up->port.lock, flags);
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|
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if (tty)
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tty_flip_buffer_push(tty);
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|
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spin_lock_irqsave(&up->port.lock, flags);
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|
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} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
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spin_unlock_irqrestore(&up->port.lock, flags);
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|
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return IRQ_HANDLED;
|
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}
|
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|
|
/* Separate interrupt handling path for keyboard/mouse ports. */
|
|
|
|
static void
|
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sunsu_change_speed(struct uart_port *port, unsigned int cflag,
|
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unsigned int iflag, unsigned int quot);
|
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|
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static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
|
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{
|
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unsigned int cur_cflag = up->cflag;
|
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int quot, new_baud;
|
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|
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up->cflag &= ~CBAUD;
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|
up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
|
|
|
|
quot = up->port.uartclk / (16 * new_baud);
|
|
|
|
sunsu_change_speed(&up->port, up->cflag, 0, quot);
|
|
}
|
|
|
|
static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
|
|
{
|
|
do {
|
|
unsigned char ch = serial_inp(up, UART_RX);
|
|
|
|
/* Stop-A is handled by drivers/char/keyboard.c now. */
|
|
if (up->su_type == SU_PORT_KBD) {
|
|
#ifdef CONFIG_SERIO
|
|
serio_interrupt(&up->serio, ch, 0);
|
|
#endif
|
|
} else if (up->su_type == SU_PORT_MS) {
|
|
int ret = suncore_mouse_baud_detection(ch, is_break);
|
|
|
|
switch (ret) {
|
|
case 2:
|
|
sunsu_change_mouse_baud(up);
|
|
/* fallthru */
|
|
case 1:
|
|
break;
|
|
|
|
case 0:
|
|
#ifdef CONFIG_SERIO
|
|
serio_interrupt(&up->serio, ch, 0);
|
|
#endif
|
|
break;
|
|
};
|
|
}
|
|
} while (serial_in(up, UART_LSR) & UART_LSR_DR);
|
|
}
|
|
|
|
static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct uart_sunsu_port *up = dev_id;
|
|
|
|
if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
|
|
unsigned char status = serial_inp(up, UART_LSR);
|
|
|
|
if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
|
|
receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static unsigned int sunsu_tx_empty(struct uart_port *port)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned long flags;
|
|
unsigned int ret;
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static unsigned int sunsu_get_mctrl(struct uart_port *port)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned char status;
|
|
unsigned int ret;
|
|
|
|
status = serial_in(up, UART_MSR);
|
|
|
|
ret = 0;
|
|
if (status & UART_MSR_DCD)
|
|
ret |= TIOCM_CAR;
|
|
if (status & UART_MSR_RI)
|
|
ret |= TIOCM_RNG;
|
|
if (status & UART_MSR_DSR)
|
|
ret |= TIOCM_DSR;
|
|
if (status & UART_MSR_CTS)
|
|
ret |= TIOCM_CTS;
|
|
return ret;
|
|
}
|
|
|
|
static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned char mcr = 0;
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
mcr |= UART_MCR_RTS;
|
|
if (mctrl & TIOCM_DTR)
|
|
mcr |= UART_MCR_DTR;
|
|
if (mctrl & TIOCM_OUT1)
|
|
mcr |= UART_MCR_OUT1;
|
|
if (mctrl & TIOCM_OUT2)
|
|
mcr |= UART_MCR_OUT2;
|
|
if (mctrl & TIOCM_LOOP)
|
|
mcr |= UART_MCR_LOOP;
|
|
|
|
serial_out(up, UART_MCR, mcr);
|
|
}
|
|
|
|
static void sunsu_break_ctl(struct uart_port *port, int break_state)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
if (break_state == -1)
|
|
up->lcr |= UART_LCR_SBC;
|
|
else
|
|
up->lcr &= ~UART_LCR_SBC;
|
|
serial_out(up, UART_LCR, up->lcr);
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
}
|
|
|
|
static int sunsu_startup(struct uart_port *port)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned long flags;
|
|
int retval;
|
|
|
|
if (up->port.type == PORT_16C950) {
|
|
/* Wake up and initialize UART */
|
|
up->acr = 0;
|
|
serial_outp(up, UART_LCR, 0xBF);
|
|
serial_outp(up, UART_EFR, UART_EFR_ECB);
|
|
serial_outp(up, UART_IER, 0);
|
|
serial_outp(up, UART_LCR, 0);
|
|
serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
|
|
serial_outp(up, UART_LCR, 0xBF);
|
|
serial_outp(up, UART_EFR, UART_EFR_ECB);
|
|
serial_outp(up, UART_LCR, 0);
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
/*
|
|
* If this is an RSA port, see if we can kick it up to the
|
|
* higher speed clock.
|
|
*/
|
|
enable_rsa(up);
|
|
#endif
|
|
|
|
/*
|
|
* Clear the FIFO buffers and disable them.
|
|
* (they will be reenabled in set_termios())
|
|
*/
|
|
if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
|
|
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
|
serial_outp(up, UART_FCR, 0);
|
|
}
|
|
|
|
/*
|
|
* Clear the interrupt registers.
|
|
*/
|
|
(void) serial_inp(up, UART_LSR);
|
|
(void) serial_inp(up, UART_RX);
|
|
(void) serial_inp(up, UART_IIR);
|
|
(void) serial_inp(up, UART_MSR);
|
|
|
|
/*
|
|
* At this point, there's no way the LSR could still be 0xff;
|
|
* if it is, then bail out, because there's likely no UART
|
|
* here.
|
|
*/
|
|
if (!(up->port.flags & UPF_BUGGY_UART) &&
|
|
(serial_inp(up, UART_LSR) == 0xff)) {
|
|
printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (up->su_type != SU_PORT_PORT) {
|
|
retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
|
|
IRQF_SHARED, su_typev[up->su_type], up);
|
|
} else {
|
|
retval = request_irq(up->port.irq, sunsu_serial_interrupt,
|
|
IRQF_SHARED, su_typev[up->su_type], up);
|
|
}
|
|
if (retval) {
|
|
printk("su: Cannot register IRQ %d\n", up->port.irq);
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* Now, initialize the UART
|
|
*/
|
|
serial_outp(up, UART_LCR, UART_LCR_WLEN8);
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
up->port.mctrl |= TIOCM_OUT2;
|
|
|
|
sunsu_set_mctrl(&up->port, up->port.mctrl);
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
/*
|
|
* Finally, enable interrupts. Note: Modem status interrupts
|
|
* are set via set_termios(), which will be occurring imminently
|
|
* anyway, so we don't enable them here.
|
|
*/
|
|
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
|
serial_outp(up, UART_IER, up->ier);
|
|
|
|
if (up->port.flags & UPF_FOURPORT) {
|
|
unsigned int icp;
|
|
/*
|
|
* Enable interrupts on the AST Fourport board
|
|
*/
|
|
icp = (up->port.iobase & 0xfe0) | 0x01f;
|
|
outb_p(0x80, icp);
|
|
(void) inb_p(icp);
|
|
}
|
|
|
|
/*
|
|
* And clear the interrupt registers again for luck.
|
|
*/
|
|
(void) serial_inp(up, UART_LSR);
|
|
(void) serial_inp(up, UART_RX);
|
|
(void) serial_inp(up, UART_IIR);
|
|
(void) serial_inp(up, UART_MSR);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sunsu_shutdown(struct uart_port *port)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned long flags;
|
|
|
|
/*
|
|
* Disable interrupts from this port
|
|
*/
|
|
up->ier = 0;
|
|
serial_outp(up, UART_IER, 0);
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
if (up->port.flags & UPF_FOURPORT) {
|
|
/* reset interrupts on the AST Fourport board */
|
|
inb((up->port.iobase & 0xfe0) | 0x1f);
|
|
up->port.mctrl |= TIOCM_OUT1;
|
|
} else
|
|
up->port.mctrl &= ~TIOCM_OUT2;
|
|
|
|
sunsu_set_mctrl(&up->port, up->port.mctrl);
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
/*
|
|
* Disable break condition and FIFOs
|
|
*/
|
|
serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
|
|
UART_FCR_CLEAR_RCVR |
|
|
UART_FCR_CLEAR_XMIT);
|
|
serial_outp(up, UART_FCR, 0);
|
|
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
/*
|
|
* Reset the RSA board back to 115kbps compat mode.
|
|
*/
|
|
disable_rsa(up);
|
|
#endif
|
|
|
|
/*
|
|
* Read data port to reset things.
|
|
*/
|
|
(void) serial_in(up, UART_RX);
|
|
|
|
free_irq(up->port.irq, up);
|
|
}
|
|
|
|
static void
|
|
sunsu_change_speed(struct uart_port *port, unsigned int cflag,
|
|
unsigned int iflag, unsigned int quot)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
unsigned char cval, fcr = 0;
|
|
unsigned long flags;
|
|
|
|
switch (cflag & CSIZE) {
|
|
case CS5:
|
|
cval = 0x00;
|
|
break;
|
|
case CS6:
|
|
cval = 0x01;
|
|
break;
|
|
case CS7:
|
|
cval = 0x02;
|
|
break;
|
|
default:
|
|
case CS8:
|
|
cval = 0x03;
|
|
break;
|
|
}
|
|
|
|
if (cflag & CSTOPB)
|
|
cval |= 0x04;
|
|
if (cflag & PARENB)
|
|
cval |= UART_LCR_PARITY;
|
|
if (!(cflag & PARODD))
|
|
cval |= UART_LCR_EPAR;
|
|
#ifdef CMSPAR
|
|
if (cflag & CMSPAR)
|
|
cval |= UART_LCR_SPAR;
|
|
#endif
|
|
|
|
/*
|
|
* Work around a bug in the Oxford Semiconductor 952 rev B
|
|
* chip which causes it to seriously miscalculate baud rates
|
|
* when DLL is 0.
|
|
*/
|
|
if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
|
|
up->rev == 0x5201)
|
|
quot ++;
|
|
|
|
if (uart_config[up->port.type].flags & UART_USE_FIFO) {
|
|
if ((up->port.uartclk / quot) < (2400 * 16))
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
else if (up->port.type == PORT_RSA)
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
|
|
#endif
|
|
else
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
|
|
}
|
|
if (up->port.type == PORT_16750)
|
|
fcr |= UART_FCR7_64BYTE;
|
|
|
|
/*
|
|
* Ok, we're now changing the port state. Do it with
|
|
* interrupts disabled.
|
|
*/
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
/*
|
|
* Update the per-port timeout.
|
|
*/
|
|
uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
|
|
|
|
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
|
|
if (iflag & INPCK)
|
|
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
|
|
if (iflag & (BRKINT | PARMRK))
|
|
up->port.read_status_mask |= UART_LSR_BI;
|
|
|
|
/*
|
|
* Characteres to ignore
|
|
*/
|
|
up->port.ignore_status_mask = 0;
|
|
if (iflag & IGNPAR)
|
|
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
|
|
if (iflag & IGNBRK) {
|
|
up->port.ignore_status_mask |= UART_LSR_BI;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (iflag & IGNPAR)
|
|
up->port.ignore_status_mask |= UART_LSR_OE;
|
|
}
|
|
|
|
/*
|
|
* ignore all characters if CREAD is not set
|
|
*/
|
|
if ((cflag & CREAD) == 0)
|
|
up->port.ignore_status_mask |= UART_LSR_DR;
|
|
|
|
/*
|
|
* CTS flow control flag and modem status interrupts
|
|
*/
|
|
up->ier &= ~UART_IER_MSI;
|
|
if (UART_ENABLE_MS(&up->port, cflag))
|
|
up->ier |= UART_IER_MSI;
|
|
|
|
serial_out(up, UART_IER, up->ier);
|
|
|
|
if (uart_config[up->port.type].flags & UART_STARTECH) {
|
|
serial_outp(up, UART_LCR, 0xBF);
|
|
serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
|
|
}
|
|
serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
|
|
serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
|
|
serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
|
|
if (up->port.type == PORT_16750)
|
|
serial_outp(up, UART_FCR, fcr); /* set fcr */
|
|
serial_outp(up, UART_LCR, cval); /* reset DLAB */
|
|
up->lcr = cval; /* Save LCR */
|
|
if (up->port.type != PORT_16750) {
|
|
if (fcr & UART_FCR_ENABLE_FIFO) {
|
|
/* emulated UARTs (Lucent Venus 167x) need two steps */
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
}
|
|
serial_outp(up, UART_FCR, fcr); /* set fcr */
|
|
}
|
|
|
|
up->cflag = cflag;
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
}
|
|
|
|
static void
|
|
sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
struct ktermios *old)
|
|
{
|
|
unsigned int baud, quot;
|
|
|
|
/*
|
|
* Ask the core to calculate the divisor for us.
|
|
*/
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
quot = uart_get_divisor(port, baud);
|
|
|
|
sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
|
|
}
|
|
|
|
static void sunsu_release_port(struct uart_port *port)
|
|
{
|
|
}
|
|
|
|
static int sunsu_request_port(struct uart_port *port)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void sunsu_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
|
|
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
/*
|
|
* We are supposed to call autoconfig here, but this requires
|
|
* splitting all the OBP probing crap from the UART probing.
|
|
* We'll do it when we kill sunsu.c altogether.
|
|
*/
|
|
port->type = up->type_probed; /* XXX */
|
|
}
|
|
}
|
|
|
|
static int
|
|
sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static const char *
|
|
sunsu_type(struct uart_port *port)
|
|
{
|
|
int type = port->type;
|
|
|
|
if (type >= ARRAY_SIZE(uart_config))
|
|
type = 0;
|
|
return uart_config[type].name;
|
|
}
|
|
|
|
static struct uart_ops sunsu_pops = {
|
|
.tx_empty = sunsu_tx_empty,
|
|
.set_mctrl = sunsu_set_mctrl,
|
|
.get_mctrl = sunsu_get_mctrl,
|
|
.stop_tx = sunsu_stop_tx,
|
|
.start_tx = sunsu_start_tx,
|
|
.stop_rx = sunsu_stop_rx,
|
|
.enable_ms = sunsu_enable_ms,
|
|
.break_ctl = sunsu_break_ctl,
|
|
.startup = sunsu_startup,
|
|
.shutdown = sunsu_shutdown,
|
|
.set_termios = sunsu_set_termios,
|
|
.type = sunsu_type,
|
|
.release_port = sunsu_release_port,
|
|
.request_port = sunsu_request_port,
|
|
.config_port = sunsu_config_port,
|
|
.verify_port = sunsu_verify_port,
|
|
};
|
|
|
|
#define UART_NR 4
|
|
|
|
static struct uart_sunsu_port sunsu_ports[UART_NR];
|
|
|
|
#ifdef CONFIG_SERIO
|
|
|
|
static DEFINE_SPINLOCK(sunsu_serio_lock);
|
|
|
|
static int sunsu_serio_write(struct serio *serio, unsigned char ch)
|
|
{
|
|
struct uart_sunsu_port *up = serio->port_data;
|
|
unsigned long flags;
|
|
int lsr;
|
|
|
|
spin_lock_irqsave(&sunsu_serio_lock, flags);
|
|
|
|
do {
|
|
lsr = serial_in(up, UART_LSR);
|
|
} while (!(lsr & UART_LSR_THRE));
|
|
|
|
/* Send the character out. */
|
|
serial_out(up, UART_TX, ch);
|
|
|
|
spin_unlock_irqrestore(&sunsu_serio_lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sunsu_serio_open(struct serio *serio)
|
|
{
|
|
struct uart_sunsu_port *up = serio->port_data;
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
spin_lock_irqsave(&sunsu_serio_lock, flags);
|
|
if (!up->serio_open) {
|
|
up->serio_open = 1;
|
|
ret = 0;
|
|
} else
|
|
ret = -EBUSY;
|
|
spin_unlock_irqrestore(&sunsu_serio_lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void sunsu_serio_close(struct serio *serio)
|
|
{
|
|
struct uart_sunsu_port *up = serio->port_data;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sunsu_serio_lock, flags);
|
|
up->serio_open = 0;
|
|
spin_unlock_irqrestore(&sunsu_serio_lock, flags);
|
|
}
|
|
|
|
#endif /* CONFIG_SERIO */
|
|
|
|
static void sunsu_autoconfig(struct uart_sunsu_port *up)
|
|
{
|
|
unsigned char status1, status2, scratch, scratch2, scratch3;
|
|
unsigned char save_lcr, save_mcr;
|
|
unsigned long flags;
|
|
|
|
if (up->su_type == SU_PORT_NONE)
|
|
return;
|
|
|
|
up->type_probed = PORT_UNKNOWN;
|
|
up->port.iotype = UPIO_MEM;
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
if (!(up->port.flags & UPF_BUGGY_UART)) {
|
|
/*
|
|
* Do a simple existence test first; if we fail this, there's
|
|
* no point trying anything else.
|
|
*
|
|
* 0x80 is used as a nonsense port to prevent against false
|
|
* positives due to ISA bus float. The assumption is that
|
|
* 0x80 is a non-existent port; which should be safe since
|
|
* include/asm/io.h also makes this assumption.
|
|
*/
|
|
scratch = serial_inp(up, UART_IER);
|
|
serial_outp(up, UART_IER, 0);
|
|
#ifdef __i386__
|
|
outb(0xff, 0x080);
|
|
#endif
|
|
scratch2 = serial_inp(up, UART_IER);
|
|
serial_outp(up, UART_IER, 0x0f);
|
|
#ifdef __i386__
|
|
outb(0, 0x080);
|
|
#endif
|
|
scratch3 = serial_inp(up, UART_IER);
|
|
serial_outp(up, UART_IER, scratch);
|
|
if (scratch2 != 0 || scratch3 != 0x0F)
|
|
goto out; /* We failed; there's nothing here */
|
|
}
|
|
|
|
save_mcr = serial_in(up, UART_MCR);
|
|
save_lcr = serial_in(up, UART_LCR);
|
|
|
|
/*
|
|
* Check to see if a UART is really there. Certain broken
|
|
* internal modems based on the Rockwell chipset fail this
|
|
* test, because they apparently don't implement the loopback
|
|
* test mode. So this test is skipped on the COM 1 through
|
|
* COM 4 ports. This *should* be safe, since no board
|
|
* manufacturer would be stupid enough to design a board
|
|
* that conflicts with COM 1-4 --- we hope!
|
|
*/
|
|
if (!(up->port.flags & UPF_SKIP_TEST)) {
|
|
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
|
|
status1 = serial_inp(up, UART_MSR) & 0xF0;
|
|
serial_outp(up, UART_MCR, save_mcr);
|
|
if (status1 != 0x90)
|
|
goto out; /* We failed loopback test */
|
|
}
|
|
serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
|
|
serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
|
|
serial_outp(up, UART_LCR, 0);
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
scratch = serial_in(up, UART_IIR) >> 6;
|
|
switch (scratch) {
|
|
case 0:
|
|
up->port.type = PORT_16450;
|
|
break;
|
|
case 1:
|
|
up->port.type = PORT_UNKNOWN;
|
|
break;
|
|
case 2:
|
|
up->port.type = PORT_16550;
|
|
break;
|
|
case 3:
|
|
up->port.type = PORT_16550A;
|
|
break;
|
|
}
|
|
if (up->port.type == PORT_16550A) {
|
|
/* Check for Startech UART's */
|
|
serial_outp(up, UART_LCR, UART_LCR_DLAB);
|
|
if (serial_in(up, UART_EFR) == 0) {
|
|
up->port.type = PORT_16650;
|
|
} else {
|
|
serial_outp(up, UART_LCR, 0xBF);
|
|
if (serial_in(up, UART_EFR) == 0)
|
|
up->port.type = PORT_16650V2;
|
|
}
|
|
}
|
|
if (up->port.type == PORT_16550A) {
|
|
/* Check for TI 16750 */
|
|
serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
|
|
serial_outp(up, UART_FCR,
|
|
UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
scratch = serial_in(up, UART_IIR) >> 5;
|
|
if (scratch == 7) {
|
|
/*
|
|
* If this is a 16750, and not a cheap UART
|
|
* clone, then it should only go into 64 byte
|
|
* mode if the UART_FCR7_64BYTE bit was set
|
|
* while UART_LCR_DLAB was latched.
|
|
*/
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
serial_outp(up, UART_LCR, 0);
|
|
serial_outp(up, UART_FCR,
|
|
UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
scratch = serial_in(up, UART_IIR) >> 5;
|
|
if (scratch == 6)
|
|
up->port.type = PORT_16750;
|
|
}
|
|
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
}
|
|
serial_outp(up, UART_LCR, save_lcr);
|
|
if (up->port.type == PORT_16450) {
|
|
scratch = serial_in(up, UART_SCR);
|
|
serial_outp(up, UART_SCR, 0xa5);
|
|
status1 = serial_in(up, UART_SCR);
|
|
serial_outp(up, UART_SCR, 0x5a);
|
|
status2 = serial_in(up, UART_SCR);
|
|
serial_outp(up, UART_SCR, scratch);
|
|
|
|
if ((status1 != 0xa5) || (status2 != 0x5a))
|
|
up->port.type = PORT_8250;
|
|
}
|
|
|
|
up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
|
|
|
|
if (up->port.type == PORT_UNKNOWN)
|
|
goto out;
|
|
up->type_probed = up->port.type; /* XXX */
|
|
|
|
/*
|
|
* Reset the UART.
|
|
*/
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
if (up->port.type == PORT_RSA)
|
|
serial_outp(up, UART_RSA_FRR, 0);
|
|
#endif
|
|
serial_outp(up, UART_MCR, save_mcr);
|
|
serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
|
|
UART_FCR_CLEAR_RCVR |
|
|
UART_FCR_CLEAR_XMIT));
|
|
serial_outp(up, UART_FCR, 0);
|
|
(void)serial_in(up, UART_RX);
|
|
serial_outp(up, UART_IER, 0);
|
|
|
|
out:
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
}
|
|
|
|
static struct uart_driver sunsu_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "sunsu",
|
|
.dev_name = "ttyS",
|
|
.major = TTY_MAJOR,
|
|
};
|
|
|
|
static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up)
|
|
{
|
|
int quot, baud;
|
|
#ifdef CONFIG_SERIO
|
|
struct serio *serio;
|
|
#endif
|
|
|
|
if (up->su_type == SU_PORT_KBD) {
|
|
up->cflag = B1200 | CS8 | CLOCAL | CREAD;
|
|
baud = 1200;
|
|
} else {
|
|
up->cflag = B4800 | CS8 | CLOCAL | CREAD;
|
|
baud = 4800;
|
|
}
|
|
quot = up->port.uartclk / (16 * baud);
|
|
|
|
sunsu_autoconfig(up);
|
|
if (up->port.type == PORT_UNKNOWN)
|
|
return -ENODEV;
|
|
|
|
printk("%s: %s port at %llx, irq %u\n",
|
|
to_of_device(up->port.dev)->node->full_name,
|
|
(up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
|
|
(unsigned long long) up->port.mapbase,
|
|
up->port.irq);
|
|
|
|
#ifdef CONFIG_SERIO
|
|
serio = &up->serio;
|
|
serio->port_data = up;
|
|
|
|
serio->id.type = SERIO_RS232;
|
|
if (up->su_type == SU_PORT_KBD) {
|
|
serio->id.proto = SERIO_SUNKBD;
|
|
strlcpy(serio->name, "sukbd", sizeof(serio->name));
|
|
} else {
|
|
serio->id.proto = SERIO_SUN;
|
|
serio->id.extra = 1;
|
|
strlcpy(serio->name, "sums", sizeof(serio->name));
|
|
}
|
|
strlcpy(serio->phys,
|
|
(!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
|
|
sizeof(serio->phys));
|
|
|
|
serio->write = sunsu_serio_write;
|
|
serio->open = sunsu_serio_open;
|
|
serio->close = sunsu_serio_close;
|
|
serio->dev.parent = up->port.dev;
|
|
|
|
serio_register_port(serio);
|
|
#endif
|
|
|
|
sunsu_change_speed(&up->port, up->cflag, 0, quot);
|
|
|
|
sunsu_startup(&up->port);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* ------------------------------------------------------------
|
|
* Serial console driver
|
|
* ------------------------------------------------------------
|
|
*/
|
|
|
|
#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
|
|
|
|
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
|
|
|
|
/*
|
|
* Wait for transmitter & holding register to empty
|
|
*/
|
|
static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
|
|
{
|
|
unsigned int status, tmout = 10000;
|
|
|
|
/* Wait up to 10ms for the character(s) to be sent. */
|
|
do {
|
|
status = serial_in(up, UART_LSR);
|
|
|
|
if (status & UART_LSR_BI)
|
|
up->lsr_break_flag = UART_LSR_BI;
|
|
|
|
if (--tmout == 0)
|
|
break;
|
|
udelay(1);
|
|
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
|
|
|
|
/* Wait up to 1s for flow control if necessary */
|
|
if (up->port.flags & UPF_CONS_FLOW) {
|
|
tmout = 1000000;
|
|
while (--tmout &&
|
|
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
|
|
udelay(1);
|
|
}
|
|
}
|
|
|
|
static void sunsu_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
|
|
|
|
wait_for_xmitr(up);
|
|
serial_out(up, UART_TX, ch);
|
|
}
|
|
|
|
/*
|
|
* Print a string to the serial port trying not to disturb
|
|
* any possible real use of the port...
|
|
*/
|
|
static void sunsu_console_write(struct console *co, const char *s,
|
|
unsigned int count)
|
|
{
|
|
struct uart_sunsu_port *up = &sunsu_ports[co->index];
|
|
unsigned long flags;
|
|
unsigned int ier;
|
|
int locked = 1;
|
|
|
|
local_irq_save(flags);
|
|
if (up->port.sysrq) {
|
|
locked = 0;
|
|
} else if (oops_in_progress) {
|
|
locked = spin_trylock(&up->port.lock);
|
|
} else
|
|
spin_lock(&up->port.lock);
|
|
|
|
/*
|
|
* First save the UER then disable the interrupts
|
|
*/
|
|
ier = serial_in(up, UART_IER);
|
|
serial_out(up, UART_IER, 0);
|
|
|
|
uart_console_write(&up->port, s, count, sunsu_console_putchar);
|
|
|
|
/*
|
|
* Finally, wait for transmitter to become empty
|
|
* and restore the IER
|
|
*/
|
|
wait_for_xmitr(up);
|
|
serial_out(up, UART_IER, ier);
|
|
|
|
if (locked)
|
|
spin_unlock(&up->port.lock);
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
/*
|
|
* Setup initial baud/bits/parity. We do two things here:
|
|
* - construct a cflag setting for the first su_open()
|
|
* - initialize the serial port
|
|
* Return non-zero if we didn't find a serial port.
|
|
*/
|
|
static int __init sunsu_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 9600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
printk("Console: ttyS%d (SU)\n",
|
|
(sunsu_reg.minor - 64) + co->index);
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (co->index >= UART_NR)
|
|
co->index = 0;
|
|
port = &sunsu_ports[co->index].port;
|
|
|
|
/*
|
|
* Temporary fix.
|
|
*/
|
|
spin_lock_init(&port->lock);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct console sunsu_console = {
|
|
.name = "ttyS",
|
|
.write = sunsu_console_write,
|
|
.device = uart_console_device,
|
|
.setup = sunsu_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &sunsu_reg,
|
|
};
|
|
|
|
/*
|
|
* Register console.
|
|
*/
|
|
|
|
static inline struct console *SUNSU_CONSOLE(void)
|
|
{
|
|
return &sunsu_console;
|
|
}
|
|
#else
|
|
#define SUNSU_CONSOLE() (NULL)
|
|
#define sunsu_serial_console_init() do { } while (0)
|
|
#endif
|
|
|
|
static enum su_type __devinit su_get_type(struct device_node *dp)
|
|
{
|
|
struct device_node *ap = of_find_node_by_path("/aliases");
|
|
|
|
if (ap) {
|
|
const char *keyb = of_get_property(ap, "keyboard", NULL);
|
|
const char *ms = of_get_property(ap, "mouse", NULL);
|
|
|
|
if (keyb) {
|
|
if (dp == of_find_node_by_path(keyb))
|
|
return SU_PORT_KBD;
|
|
}
|
|
if (ms) {
|
|
if (dp == of_find_node_by_path(ms))
|
|
return SU_PORT_MS;
|
|
}
|
|
}
|
|
|
|
return SU_PORT_PORT;
|
|
}
|
|
|
|
static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
|
|
{
|
|
static int inst;
|
|
struct device_node *dp = op->node;
|
|
struct uart_sunsu_port *up;
|
|
struct resource *rp;
|
|
enum su_type type;
|
|
int err;
|
|
|
|
type = su_get_type(dp);
|
|
if (type == SU_PORT_PORT) {
|
|
if (inst >= UART_NR)
|
|
return -EINVAL;
|
|
up = &sunsu_ports[inst];
|
|
} else {
|
|
up = kzalloc(sizeof(*up), GFP_KERNEL);
|
|
if (!up)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
up->port.line = inst;
|
|
|
|
spin_lock_init(&up->port.lock);
|
|
|
|
up->su_type = type;
|
|
|
|
rp = &op->resource[0];
|
|
up->port.mapbase = rp->start;
|
|
up->reg_size = (rp->end - rp->start) + 1;
|
|
up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
|
|
if (!up->port.membase) {
|
|
if (type != SU_PORT_PORT)
|
|
kfree(up);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
up->port.irq = op->irqs[0];
|
|
|
|
up->port.dev = &op->dev;
|
|
|
|
up->port.type = PORT_UNKNOWN;
|
|
up->port.uartclk = (SU_BASE_BAUD * 16);
|
|
|
|
err = 0;
|
|
if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
|
|
err = sunsu_kbd_ms_init(up);
|
|
if (err) {
|
|
kfree(up);
|
|
goto out_unmap;
|
|
}
|
|
dev_set_drvdata(&op->dev, up);
|
|
|
|
return 0;
|
|
}
|
|
|
|
up->port.flags |= UPF_BOOT_AUTOCONF;
|
|
|
|
sunsu_autoconfig(up);
|
|
|
|
err = -ENODEV;
|
|
if (up->port.type == PORT_UNKNOWN)
|
|
goto out_unmap;
|
|
|
|
up->port.ops = &sunsu_pops;
|
|
|
|
sunserial_console_match(SUNSU_CONSOLE(), dp,
|
|
&sunsu_reg, up->port.line);
|
|
err = uart_add_one_port(&sunsu_reg, &up->port);
|
|
if (err)
|
|
goto out_unmap;
|
|
|
|
dev_set_drvdata(&op->dev, up);
|
|
|
|
inst++;
|
|
|
|
return 0;
|
|
|
|
out_unmap:
|
|
of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
|
|
return err;
|
|
}
|
|
|
|
static int __devexit su_remove(struct of_device *op)
|
|
{
|
|
struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
|
|
|
|
if (up->su_type == SU_PORT_MS ||
|
|
up->su_type == SU_PORT_KBD) {
|
|
#ifdef CONFIG_SERIO
|
|
serio_unregister_port(&up->serio);
|
|
#endif
|
|
kfree(up);
|
|
} else if (up->port.type != PORT_UNKNOWN) {
|
|
uart_remove_one_port(&sunsu_reg, &up->port);
|
|
}
|
|
|
|
if (up->port.membase)
|
|
of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
|
|
|
|
dev_set_drvdata(&op->dev, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id su_match[] = {
|
|
{
|
|
.name = "su",
|
|
},
|
|
{
|
|
.name = "su_pnp",
|
|
},
|
|
{
|
|
.name = "serial",
|
|
.compatible = "su",
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, su_match);
|
|
|
|
static struct of_platform_driver su_driver = {
|
|
.name = "su",
|
|
.match_table = su_match,
|
|
.probe = su_probe,
|
|
.remove = __devexit_p(su_remove),
|
|
};
|
|
|
|
static int __init sunsu_init(void)
|
|
{
|
|
struct device_node *dp;
|
|
int err;
|
|
int num_uart = 0;
|
|
|
|
for_each_node_by_name(dp, "su") {
|
|
if (su_get_type(dp) == SU_PORT_PORT)
|
|
num_uart++;
|
|
}
|
|
for_each_node_by_name(dp, "su_pnp") {
|
|
if (su_get_type(dp) == SU_PORT_PORT)
|
|
num_uart++;
|
|
}
|
|
for_each_node_by_name(dp, "serial") {
|
|
if (of_device_is_compatible(dp, "su")) {
|
|
if (su_get_type(dp) == SU_PORT_PORT)
|
|
num_uart++;
|
|
}
|
|
}
|
|
|
|
if (num_uart) {
|
|
err = sunserial_register_minors(&sunsu_reg, num_uart);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
err = of_register_driver(&su_driver, &of_bus_type);
|
|
if (err && num_uart)
|
|
sunserial_unregister_minors(&sunsu_reg, num_uart);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void __exit sunsu_exit(void)
|
|
{
|
|
if (sunsu_reg.nr)
|
|
sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
|
|
}
|
|
|
|
module_init(sunsu_init);
|
|
module_exit(sunsu_exit);
|
|
|
|
MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
|
|
MODULE_DESCRIPTION("Sun SU serial port driver");
|
|
MODULE_VERSION("2.0");
|
|
MODULE_LICENSE("GPL");
|