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8340e915ea
The Rapid General-Purpose Input and Output with 2 Ports (RGPIO2P) on MX7ULP is similar to GPIO on Vibrid, except it has an extra Port Data Direction Register (PDDR) used to configure the individual port pins for input or output. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
58 lines
1.8 KiB
Plaintext
58 lines
1.8 KiB
Plaintext
* Freescale VF610 PORT/GPIO module
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The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
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functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of
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each, and each PORT module has its own interrupt.
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Required properties for GPIO node:
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- compatible : Should be "fsl,<soc>-gpio", below is supported list:
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"fsl,vf610-gpio"
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"fsl,imx7ulp-gpio"
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- reg : The first reg tuple represents the PORT module, the second tuple
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the GPIO module.
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be 2. The first cell is the GPIO number.
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The second cell bits[3:0] is used to specify trigger type and level flags:
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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4 = active high level-sensitive.
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8 = active low level-sensitive.
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Note: Each GPIO port should have an alias correctly numbered in "aliases"
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node.
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Examples:
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aliases {
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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};
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gpio1: gpio@40049000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x40049000 0x1000 0x400ff000 0x40>;
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interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 0 32>;
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};
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gpio2: gpio@4004a000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004a000 0x1000 0x400ff040 0x40>;
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interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 32 32>;
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};
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