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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
329 lines
7.1 KiB
C
329 lines
7.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2002 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*/
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#ifndef _ASM_FPU_H
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#define _ASM_FPU_H
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#include <linux/sched.h>
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#include <linux/sched/task_stack.h>
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#include <linux/ptrace.h>
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#include <linux/thread_info.h>
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#include <linux/bitops.h>
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#include <asm/mipsregs.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/fpu_emulator.h>
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#include <asm/hazards.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/current.h>
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#include <asm/msa.h>
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#ifdef CONFIG_MIPS_MT_FPAFF
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#include <asm/mips_mt.h>
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#endif
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/*
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* This enum specifies a mode in which we want the FPU to operate, for cores
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* which implement the Status.FR bit. Note that the bottom bit of the value
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* purposefully matches the desired value of the Status.FR bit.
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*/
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enum fpu_mode {
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FPU_32BIT = 0, /* FR = 0 */
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FPU_64BIT, /* FR = 1, FRE = 0 */
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FPU_AS_IS,
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FPU_HYBRID, /* FR = 1, FRE = 1 */
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#define FPU_FR_MASK 0x1
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};
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#ifdef CONFIG_MIPS_FP_SUPPORT
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extern void _save_fp(struct task_struct *);
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extern void _restore_fp(struct task_struct *);
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#define __disable_fpu() \
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do { \
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clear_c0_status(ST0_CU1); \
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disable_fpu_hazard(); \
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} while (0)
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static inline int __enable_fpu(enum fpu_mode mode)
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{
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int fr;
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switch (mode) {
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case FPU_AS_IS:
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/* just enable the FPU in its current mode */
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set_c0_status(ST0_CU1);
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enable_fpu_hazard();
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return 0;
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case FPU_HYBRID:
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if (!cpu_has_fre)
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return SIGFPE;
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/* set FRE */
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set_c0_config5(MIPS_CONF5_FRE);
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goto fr_common;
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case FPU_64BIT:
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#if !(defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) \
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|| defined(CONFIG_64BIT))
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/* we only have a 32-bit FPU */
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return SIGFPE;
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#endif
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/* fall through */
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case FPU_32BIT:
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if (cpu_has_fre) {
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/* clear FRE */
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clear_c0_config5(MIPS_CONF5_FRE);
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}
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fr_common:
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/* set CU1 & change FR appropriately */
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fr = (int)mode & FPU_FR_MASK;
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change_c0_status(ST0_CU1 | ST0_FR, ST0_CU1 | (fr ? ST0_FR : 0));
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enable_fpu_hazard();
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/* check FR has the desired value */
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if (!!(read_c0_status() & ST0_FR) == !!fr)
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return 0;
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/* unsupported FR value */
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__disable_fpu();
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return SIGFPE;
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default:
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BUG();
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}
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return SIGFPE;
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}
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#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
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static inline int __is_fpu_owner(void)
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{
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return test_thread_flag(TIF_USEDFPU);
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}
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static inline int is_fpu_owner(void)
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{
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return cpu_has_fpu && __is_fpu_owner();
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}
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static inline int __own_fpu(void)
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{
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enum fpu_mode mode;
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int ret;
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if (test_thread_flag(TIF_HYBRID_FPREGS))
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mode = FPU_HYBRID;
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else
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mode = !test_thread_flag(TIF_32BIT_FPREGS);
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ret = __enable_fpu(mode);
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if (ret)
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return ret;
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KSTK_STATUS(current) |= ST0_CU1;
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if (mode == FPU_64BIT || mode == FPU_HYBRID)
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KSTK_STATUS(current) |= ST0_FR;
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else /* mode == FPU_32BIT */
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KSTK_STATUS(current) &= ~ST0_FR;
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set_thread_flag(TIF_USEDFPU);
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return 0;
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}
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static inline int own_fpu_inatomic(int restore)
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{
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int ret = 0;
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if (cpu_has_fpu && !__is_fpu_owner()) {
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ret = __own_fpu();
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if (restore && !ret)
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_restore_fp(current);
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}
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return ret;
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}
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static inline int own_fpu(int restore)
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{
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int ret;
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preempt_disable();
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ret = own_fpu_inatomic(restore);
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preempt_enable();
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return ret;
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}
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static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
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{
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if (is_msa_enabled()) {
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if (save) {
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save_msa(tsk);
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tsk->thread.fpu.fcr31 =
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read_32bit_cp1_register(CP1_STATUS);
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}
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disable_msa();
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clear_tsk_thread_flag(tsk, TIF_USEDMSA);
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__disable_fpu();
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} else if (is_fpu_owner()) {
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if (save)
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_save_fp(tsk);
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__disable_fpu();
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} else {
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/* FPU should not have been left enabled with no owner */
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WARN(read_c0_status() & ST0_CU1,
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"Orphaned FPU left enabled");
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}
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KSTK_STATUS(tsk) &= ~ST0_CU1;
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clear_tsk_thread_flag(tsk, TIF_USEDFPU);
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}
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static inline void lose_fpu(int save)
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{
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preempt_disable();
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lose_fpu_inatomic(save, current);
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preempt_enable();
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}
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/**
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* init_fp_ctx() - Initialize task FP context
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* @target: The task whose FP context should be initialized.
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*
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* Initializes the FP context of the target task to sane default values if that
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* target task does not already have valid FP context. Once the context has
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* been initialized, the task will be marked as having used FP & thus having
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* valid FP context.
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*
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* Returns: true if context is initialized, else false.
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*/
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static inline bool init_fp_ctx(struct task_struct *target)
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{
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/* If FP has been used then the target already has context */
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if (tsk_used_math(target))
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return false;
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/* Begin with data registers set to all 1s... */
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memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
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/* FCSR has been preset by `mips_set_personality_nan'. */
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/*
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* Record that the target has "used" math, such that the context
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* just initialised, and any modifications made by the caller,
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* aren't discarded.
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*/
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set_stopped_child_used_math(target);
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return true;
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}
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static inline void save_fp(struct task_struct *tsk)
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{
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if (cpu_has_fpu)
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_save_fp(tsk);
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}
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static inline void restore_fp(struct task_struct *tsk)
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{
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if (cpu_has_fpu)
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_restore_fp(tsk);
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}
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static inline union fpureg *get_fpu_regs(struct task_struct *tsk)
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{
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if (tsk == current) {
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preempt_disable();
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if (is_fpu_owner())
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_save_fp(current);
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preempt_enable();
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}
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return tsk->thread.fpu.fpr;
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}
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#else /* !CONFIG_MIPS_FP_SUPPORT */
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/*
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* When FP support is disabled we provide only a minimal set of stub functions
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* to avoid callers needing to care too much about CONFIG_MIPS_FP_SUPPORT.
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*/
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static inline int __enable_fpu(enum fpu_mode mode)
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{
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return SIGILL;
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}
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static inline void __disable_fpu(void)
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{
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/* no-op */
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}
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static inline int is_fpu_owner(void)
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{
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return 0;
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}
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static inline void clear_fpu_owner(void)
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{
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/* no-op */
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}
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static inline int own_fpu_inatomic(int restore)
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{
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return SIGILL;
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}
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static inline int own_fpu(int restore)
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{
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return SIGILL;
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}
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static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
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{
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/* no-op */
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}
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static inline void lose_fpu(int save)
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{
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/* no-op */
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}
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static inline bool init_fp_ctx(struct task_struct *target)
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{
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return false;
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}
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/*
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* The following functions should only be called in paths where we know that FP
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* support is enabled, typically a path where own_fpu() or __enable_fpu() have
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* returned successfully. When CONFIG_MIPS_FP_SUPPORT=n it is known at compile
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* time that this should never happen, so calls to these functions should be
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* optimized away & never actually be emitted.
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*/
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extern void save_fp(struct task_struct *tsk)
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__compiletime_error("save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
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extern void _save_fp(struct task_struct *)
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__compiletime_error("_save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
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extern void restore_fp(struct task_struct *tsk)
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__compiletime_error("restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
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extern void _restore_fp(struct task_struct *)
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__compiletime_error("_restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
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extern union fpureg *get_fpu_regs(struct task_struct *tsk)
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__compiletime_error("get_fpu_regs() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
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#endif /* !CONFIG_MIPS_FP_SUPPORT */
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#endif /* _ASM_FPU_H */
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