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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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013de2d667
This patch adds files related to memory management and here is our memory-layout: Fixmap : 0xffc02000 – 0xfffff000 (4 MB - 12KB) Pkmap : 0xff800000 – 0xffc00000 (4 MB) Vmalloc : 0xf0200000 – 0xff000000 (238 MB) Lowmem : 0x80000000 – 0xc0000000 (1GB) abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. abiv2 CPUs are all PIPT cache and they could support highmem. Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup memory page table for it. Link:https://lore.kernel.org/lkml/20180518215548.GH17671@n2100.armlinux.org.uk/ Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Christoph Hellwig <hch@infradead.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
28 lines
749 B
C
28 lines
749 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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extern unsigned long shm_align_mask;
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extern void flush_dcache_page(struct page *page);
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static inline unsigned long pages_do_alias(unsigned long addr1,
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unsigned long addr2)
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{
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return (addr1 ^ addr2) & shm_align_mask;
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}
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static inline void clear_user_page(void *addr, unsigned long vaddr,
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struct page *page)
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{
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clear_page(addr);
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if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
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flush_dcache_page(page);
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}
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static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
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struct page *page)
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{
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copy_page(to, from);
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if (pages_do_alias((unsigned long) to, vaddr & PAGE_MASK))
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flush_dcache_page(page);
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}
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