ryan_chen c926c87b8e i2c: aspeed: Avoid i2c interrupt status clear race condition. ... In AST2600 there have a slow peripheral bus between CPU and i2c controller. Therefore GIC i2c interrupt status clear have delay timing, when CPU issue write clear i2c controller interrupt status. To avoid this issue, the driver need have read after write clear at i2c ISR. Fixes: f327c686d3 ("i2c: aspeed: added driver for Aspeed I2C") Signed-off-by: ryan_chen <ryan_chen@aspeedtech.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [wsa: added Fixes tag] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>		2020-04-30 16:12:33 +02:00
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algos
busses
muxes
i2c-boardinfo.c
i2c-core-acpi.c
i2c-core-base.c
i2c-core-of.c
i2c-core-slave.c
i2c-core-smbus.c
i2c-core.h
i2c-dev.c
i2c-mux.c
i2c-slave-eeprom.c
i2c-smbus.c
i2c-stub.c
Kconfig
Makefile