mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 07:06:45 +07:00
0a428036df
The USB1 port on Tegra2 supports operation in host or device modes. On Seaboard this is possible, so mark the port as OTG. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
176 lines
3.7 KiB
Plaintext
176 lines
3.7 KiB
Plaintext
/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Seaboard";
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compatible = "nvidia,seaboard", "nvidia,tegra20";
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memory {
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device_type = "memory";
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reg = < 0x00000000 0x40000000 >;
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};
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i2c@7000c000 {
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clock-frequency = <400000>;
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = < 187 0x04 >;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
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};
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};
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i2c@7000c400 {
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clock-frequency = <400000>;
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};
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i2c@7000c500 {
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clock-frequency = <400000>;
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};
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i2c@7000d000 {
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clock-frequency = <400000>;
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adt7461@4c {
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compatible = "adt7461";
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reg = <0x4c>;
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};
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};
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i2s@70002a00 {
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status = "disable";
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};
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sound {
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compatible = "nvidia,tegra-audio-wm8903-seaboard",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "NVIDIA Tegra Seaboard";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
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"Int Spk", "LON",
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"Mic Jack", "MICBIAS",
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"IN1R", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 0>;
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nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
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};
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serial@70006000 {
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status = "disable";
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};
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serial@70006040 {
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status = "disable";
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};
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serial@70006200 {
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status = "disable";
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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serial@70006400 {
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status = "disable";
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};
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sdhci@c8000000 {
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status = "disable";
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};
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sdhci@c8000200 {
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status = "disable";
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};
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sdhci@c8000400 {
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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};
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sdhci@c8000600 {
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support-8bit;
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};
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usb@c5000000 {
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nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
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dr_mode = "otg";
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};
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gpio-keys {
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compatible = "gpio-keys";
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power {
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label = "Power";
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gpios = <&gpio 170 1>; /* gpio PV2, active low */
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linux,code = <116>; /* KEY_POWER */
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gpio-key,wakeup;
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};
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lid {
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label = "Lid";
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gpios = <&gpio 23 0>; /* gpio PC7 */
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linux,input-type = <5>; /* EV_SW */
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linux,code = <0>; /* SW_LID */
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debounce-interval = <1>;
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gpio-key,wakeup;
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};
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};
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emc@7000f400 {
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emc-table@190000 {
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reg = < 190000 >;
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compatible = "nvidia,tegra20-emc-table";
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clock-frequency = < 190000 >;
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nvidia,emc-registers = < 0x0000000c 0x00000026
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0x00000009 0x00000003 0x00000004 0x00000004
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0x00000002 0x0000000c 0x00000003 0x00000003
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0x00000002 0x00000001 0x00000004 0x00000005
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0x00000004 0x00000009 0x0000000d 0x0000059f
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0x00000000 0x00000003 0x00000003 0x00000003
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0x00000003 0x00000001 0x0000000b 0x000000c8
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0x00000003 0x00000007 0x00000004 0x0000000f
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0x00000002 0x00000000 0x00000000 0x00000002
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0x00000000 0x00000000 0x00000083 0xa06204ae
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0x007dc010 0x00000000 0x00000000 0x00000000
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0x00000000 0x00000000 0x00000000 0x00000000 >;
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};
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emc-table@380000 {
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reg = < 380000 >;
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compatible = "nvidia,tegra20-emc-table";
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clock-frequency = < 380000 >;
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nvidia,emc-registers = < 0x00000017 0x0000004b
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0x00000012 0x00000006 0x00000004 0x00000005
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0x00000003 0x0000000c 0x00000006 0x00000006
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0x00000003 0x00000001 0x00000004 0x00000005
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0x00000004 0x00000009 0x0000000d 0x00000b5f
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0x00000000 0x00000003 0x00000003 0x00000006
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0x00000006 0x00000001 0x00000011 0x000000c8
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0x00000003 0x0000000e 0x00000007 0x0000000f
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0x00000002 0x00000000 0x00000000 0x00000002
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0x00000000 0x00000000 0x00000083 0xe044048b
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0x007d8010 0x00000000 0x00000000 0x00000000
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0x00000000 0x00000000 0x00000000 0x00000000 >;
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};
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};
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};
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