Xiaojie Yuan 4caca70668 drm/amdgpu: add DP audio support for si dce6 (v3) ... v2: refine dce_v6_0_audio_endpt_wreg() and unify inconsistent method names v3: fix num_pins for tahiti, pitcairn, verde and oland Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-05-24 17:39:58 -04:00
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bif	drm/amd/amdgpu: Introduction of SI registers (v2)	2016-11-11 10:21:07 -05:00
dce	drm/amdgpu: add DP audio support for si dce6 (v3)	2017-05-24 17:39:58 -04:00
gca	drm/amd/amdgpu: add SI defines/registers	2016-11-11 10:21:08 -05:00
gmc	drm/amdgpu: implement PRT for GFX6 v2	2017-03-29 23:52:57 -04:00
oss	drm/amd/amdgpu: add SI defines/registers	2016-11-11 10:21:08 -05:00
smu	drm/amd/powerplay: add a new register define for APU in VI.	2017-03-29 23:54:06 -04:00
uvd	drm/amd/amdgpu: Introduction of SI registers (v2)	2016-11-11 10:21:07 -05:00
vce	drm/amd/amdgpu: Introduction of SI registers (v2)	2016-11-11 10:21:07 -05:00
vega10	drm/amdgpu: add the VCE 4.0 register headers	2017-03-29 23:54:28 -04:00