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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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081ba80206
The default behaviour with clk_rcg2_ops is for the clk_round_rate()/clk_set_rate() to return/set a ceil clock rate closest to the requested rate by looking up the corresponding frequency table. However, we do have some instances (mainly sdcc on various platforms) of clients expecting a clk_set_rate() to set a floor value instead. Add a new clk_rcg2_floor_ops to handle this for such specific rcg instances Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*
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* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __QCOM_CLK_COMMON_H__
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#define __QCOM_CLK_COMMON_H__
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struct platform_device;
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struct regmap_config;
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struct clk_regmap;
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struct qcom_reset_map;
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struct regmap;
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struct freq_tbl;
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struct clk_hw;
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struct parent_map;
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#define PLL_LOCK_COUNT_SHIFT 8
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#define PLL_LOCK_COUNT_MASK 0x3f
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#define PLL_BIAS_COUNT_SHIFT 14
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#define PLL_BIAS_COUNT_MASK 0x3f
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#define PLL_VOTE_FSM_ENA BIT(20)
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#define PLL_VOTE_FSM_RESET BIT(21)
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struct qcom_cc_desc {
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const struct regmap_config *config;
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struct clk_regmap **clks;
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size_t num_clks;
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const struct qcom_reset_map *resets;
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size_t num_resets;
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struct gdsc **gdscs;
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size_t num_gdscs;
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};
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extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
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unsigned long rate);
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extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
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unsigned long rate);
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extern void
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qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
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extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
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u8 src);
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extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate);
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extern int qcom_cc_register_sleep_clk(struct device *dev);
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extern struct regmap *qcom_cc_map(struct platform_device *pdev,
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const struct qcom_cc_desc *desc);
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extern int qcom_cc_really_probe(struct platform_device *pdev,
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const struct qcom_cc_desc *desc,
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struct regmap *regmap);
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extern int qcom_cc_probe(struct platform_device *pdev,
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const struct qcom_cc_desc *desc);
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#endif
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