mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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319 lines
7.6 KiB
C
319 lines
7.6 KiB
C
/*
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* Wind River SBC8560 setup and early boot code.
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*
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* Copyright 2007 Wind River Systems Inc.
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*
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* By Paul Gortmaker (see MAINTAINERS for contact information)
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*
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* Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of_platform.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#ifdef CONFIG_CPM2
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#include <asm/cpm2.h>
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#include <sysdev/cpm2_pic.h>
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#endif
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#ifdef CONFIG_CPM2
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static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int cascade_irq;
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while ((cascade_irq = cpm2_get_irq()) >= 0)
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generic_handle_irq(cascade_irq);
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chip->irq_eoi(&desc->irq_data);
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}
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#endif /* CONFIG_CPM2 */
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static void __init sbc8560_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np = NULL;
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#ifdef CONFIG_CPM2
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int irq;
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#endif
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np = of_find_node_by_type(np, "open-pic");
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if (!np) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Could not map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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#ifdef CONFIG_CPM2
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/* Setup CPM2 PIC */
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np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
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if (np == NULL) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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irq = irq_of_parse_and_map(np, 0);
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cpm2_pic_init(np);
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of_node_put(np);
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irq_set_chained_handler(irq, cpm2_cascade);
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#endif
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}
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/*
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* Setup the architecture
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*/
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#ifdef CONFIG_CPM2
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struct cpm_pin {
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int port, pin, flags;
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};
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static const struct cpm_pin sbc8560_pins[] = {
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/* SCC1 */
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{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* SCC2 */
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{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC2 */
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{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
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{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
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/* FCC3 */
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{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
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{2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
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const struct cpm_pin *pin = &sbc8560_pins[i];
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cpm2_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
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}
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#endif
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static void __init sbc8560_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("sbc8560_setup_arch()", 0);
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#ifdef CONFIG_CPM2
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cpm2_reset();
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init_ioports();
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#endif
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#ifdef CONFIG_PCI
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for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
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fsl_add_bridge(np, 1);
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#endif
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}
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static void sbc8560_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Wind River\n");
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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}
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static struct of_device_id __initdata of_bus_ids[] = {
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{ .name = "soc", },
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{ .type = "soc", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{ .compatible = "simple-bus", },
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{ .compatible = "gianfar", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(sbc8560, declare_of_platform_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init sbc8560_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "SBC8560");
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}
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#ifdef CONFIG_RTC_DRV_M48T59
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static int __init sbc8560_rtc_init(void)
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{
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struct device_node *np;
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struct resource res;
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struct platform_device *rtc_dev;
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np = of_find_compatible_node(NULL, NULL, "m48t59");
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if (np == NULL) {
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printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
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return -ENODEV;
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}
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of_address_to_resource(np, 0, &res);
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of_node_put(np);
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printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
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rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
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if (IS_ERR(rtc_dev)) {
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printk("Registering sbc8560 RTC device failed\n");
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return PTR_ERR(rtc_dev);
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}
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return 0;
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}
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arch_initcall(sbc8560_rtc_init);
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#endif /* M48T59 */
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static __u8 __iomem *brstcr;
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static int __init sbc8560_bdrstcr_init(void)
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{
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struct device_node *np;
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struct resource res;
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np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
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if (np == NULL) {
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printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
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return -ENODEV;
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}
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of_address_to_resource(np, 0, &res);
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printk(KERN_INFO "sbc8560: Found BRSTCR at i/o 0x%x\n", res.start);
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brstcr = ioremap(res.start, res.end - res.start);
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if(!brstcr)
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printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
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of_node_put(np);
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return 0;
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}
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arch_initcall(sbc8560_bdrstcr_init);
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void sbc8560_rstcr_restart(char * cmd)
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{
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local_irq_disable();
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if(brstcr)
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clrbits8(brstcr, 0x80);
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while(1);
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}
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define_machine(sbc8560) {
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.name = "SBC8560",
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.probe = sbc8560_probe,
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.setup_arch = sbc8560_setup_arch,
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.init_IRQ = sbc8560_pic_init,
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.show_cpuinfo = sbc8560_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = sbc8560_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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