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The _HPX Type 3 Setting Record is intended to be more generic and allow configuration of settings not possible with Type 2 records. For example, firmware could ensure that the completion timeout value is set accordingly throughout the PCI tree. Implement support for _HPX Type 3 Setting Records, which were added in the ACPI 6.3 spec. Link: https://lore.kernel.org/lkml/20190208162414.3996-4-mr.nuke.me@gmail.com Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
210 lines
6.4 KiB
C
210 lines
6.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* PCI HotPlug Core Functions
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM Corp.
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*
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* All rights reserved.
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*
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* Send feedback to <kristen.c.accardi@intel.com>
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*
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*/
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#ifndef _PCI_HOTPLUG_H
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#define _PCI_HOTPLUG_H
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/**
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* struct hotplug_slot_ops -the callbacks that the hotplug pci core can use
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* @enable_slot: Called when the user wants to enable a specific pci slot
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* @disable_slot: Called when the user wants to disable a specific pci slot
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* @set_attention_status: Called to set the specific slot's attention LED to
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* the specified value
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* @hardware_test: Called to run a specified hardware test on the specified
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* slot.
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* @get_power_status: Called to get the current power status of a slot.
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* @get_attention_status: Called to get the current attention status of a slot.
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* @get_latch_status: Called to get the current latch status of a slot.
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* @get_adapter_status: Called to get see if an adapter is present in the slot or not.
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* @reset_slot: Optional interface to allow override of a bus reset for the
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* slot for cases where a secondary bus reset can result in spurious
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* hotplug events or where a slot can be reset independent of the bus.
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*
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* The table of function pointers that is passed to the hotplug pci core by a
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* hotplug pci driver. These functions are called by the hotplug pci core when
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* the user wants to do something to a specific slot (query it for information,
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* set an LED, enable / disable power, etc.)
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*/
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struct hotplug_slot_ops {
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int (*enable_slot) (struct hotplug_slot *slot);
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int (*disable_slot) (struct hotplug_slot *slot);
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int (*set_attention_status) (struct hotplug_slot *slot, u8 value);
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int (*hardware_test) (struct hotplug_slot *slot, u32 value);
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int (*get_power_status) (struct hotplug_slot *slot, u8 *value);
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int (*get_attention_status) (struct hotplug_slot *slot, u8 *value);
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int (*get_latch_status) (struct hotplug_slot *slot, u8 *value);
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int (*get_adapter_status) (struct hotplug_slot *slot, u8 *value);
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int (*reset_slot) (struct hotplug_slot *slot, int probe);
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};
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/**
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* struct hotplug_slot - used to register a physical slot with the hotplug pci core
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* @ops: pointer to the &struct hotplug_slot_ops to be used for this slot
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* @owner: The module owner of this structure
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* @mod_name: The module name (KBUILD_MODNAME) of this structure
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*/
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struct hotplug_slot {
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const struct hotplug_slot_ops *ops;
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/* Variables below this are for use only by the hotplug pci core. */
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struct list_head slot_list;
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struct pci_slot *pci_slot;
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struct module *owner;
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const char *mod_name;
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};
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static inline const char *hotplug_slot_name(const struct hotplug_slot *slot)
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{
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return pci_slot_name(slot->pci_slot);
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}
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int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *pbus, int nr,
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const char *name, struct module *owner,
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const char *mod_name);
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int __pci_hp_initialize(struct hotplug_slot *slot, struct pci_bus *bus, int nr,
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const char *name, struct module *owner,
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const char *mod_name);
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int pci_hp_add(struct hotplug_slot *slot);
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void pci_hp_del(struct hotplug_slot *slot);
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void pci_hp_destroy(struct hotplug_slot *slot);
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void pci_hp_deregister(struct hotplug_slot *slot);
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/* use a define to avoid include chaining to get THIS_MODULE & friends */
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#define pci_hp_register(slot, pbus, devnr, name) \
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__pci_hp_register(slot, pbus, devnr, name, THIS_MODULE, KBUILD_MODNAME)
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#define pci_hp_initialize(slot, bus, nr, name) \
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__pci_hp_initialize(slot, bus, nr, name, THIS_MODULE, KBUILD_MODNAME)
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/* PCI Setting Record (Type 0) */
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struct hpp_type0 {
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u32 revision;
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u8 cache_line_size;
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u8 latency_timer;
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u8 enable_serr;
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u8 enable_perr;
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};
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/* PCI-X Setting Record (Type 1) */
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struct hpp_type1 {
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u32 revision;
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u8 max_mem_read;
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u8 avg_max_split;
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u16 tot_max_split;
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};
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/* PCI Express Setting Record (Type 2) */
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struct hpp_type2 {
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u32 revision;
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u32 unc_err_mask_and;
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u32 unc_err_mask_or;
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u32 unc_err_sever_and;
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u32 unc_err_sever_or;
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u32 cor_err_mask_and;
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u32 cor_err_mask_or;
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u32 adv_err_cap_and;
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u32 adv_err_cap_or;
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u16 pci_exp_devctl_and;
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u16 pci_exp_devctl_or;
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u16 pci_exp_lnkctl_and;
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u16 pci_exp_lnkctl_or;
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u32 sec_unc_err_sever_and;
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u32 sec_unc_err_sever_or;
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u32 sec_unc_err_mask_and;
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u32 sec_unc_err_mask_or;
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};
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/*
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* _HPX PCI Express Setting Record (Type 3)
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*/
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struct hpx_type3 {
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u16 device_type;
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u16 function_type;
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u16 config_space_location;
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u16 pci_exp_cap_id;
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u16 pci_exp_cap_ver;
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u16 pci_exp_vendor_id;
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u16 dvsec_id;
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u16 dvsec_rev;
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u16 match_offset;
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u32 match_mask_and;
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u32 match_value;
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u16 reg_offset;
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u32 reg_mask_and;
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u32 reg_mask_or;
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};
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struct hotplug_program_ops {
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void (*program_type0)(struct pci_dev *dev, struct hpp_type0 *hpp);
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void (*program_type1)(struct pci_dev *dev, struct hpp_type1 *hpp);
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void (*program_type2)(struct pci_dev *dev, struct hpp_type2 *hpp);
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void (*program_type3)(struct pci_dev *dev, struct hpx_type3 *hpp);
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};
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enum hpx_type3_dev_type {
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HPX_TYPE_ENDPOINT = BIT(0),
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HPX_TYPE_LEG_END = BIT(1),
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HPX_TYPE_RC_END = BIT(2),
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HPX_TYPE_RC_EC = BIT(3),
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HPX_TYPE_ROOT_PORT = BIT(4),
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HPX_TYPE_UPSTREAM = BIT(5),
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HPX_TYPE_DOWNSTREAM = BIT(6),
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HPX_TYPE_PCI_BRIDGE = BIT(7),
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HPX_TYPE_PCIE_BRIDGE = BIT(8),
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};
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enum hpx_type3_fn_type {
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HPX_FN_NORMAL = BIT(0),
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HPX_FN_SRIOV_PHYS = BIT(1),
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HPX_FN_SRIOV_VIRT = BIT(2),
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};
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enum hpx_type3_cfg_loc {
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HPX_CFG_PCICFG = 0,
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HPX_CFG_PCIE_CAP = 1,
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HPX_CFG_PCIE_CAP_EXT = 2,
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HPX_CFG_VEND_CAP = 3,
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HPX_CFG_DVSEC = 4,
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HPX_CFG_MAX,
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};
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#ifdef CONFIG_ACPI
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#include <linux/acpi.h>
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int pci_acpi_program_hp_params(struct pci_dev *dev,
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const struct hotplug_program_ops *hp_ops);
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bool pciehp_is_native(struct pci_dev *bridge);
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int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge);
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bool shpchp_is_native(struct pci_dev *bridge);
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int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle);
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int acpi_pci_detect_ejectable(acpi_handle handle);
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#else
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static inline int pci_acpi_program_hp_params(struct pci_dev *dev,
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const struct hotplug_program_ops *hp_ops)
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{
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return -ENODEV;
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}
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static inline int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge)
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{
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return 0;
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}
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static inline bool pciehp_is_native(struct pci_dev *bridge) { return true; }
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static inline bool shpchp_is_native(struct pci_dev *bridge) { return true; }
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#endif
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static inline bool hotplug_is_native(struct pci_dev *bridge)
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{
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return pciehp_is_native(bridge) || shpchp_is_native(bridge);
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}
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#endif
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