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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4c172bbfaa
We want to stop using the acronym KMD. Therefore, replace all locations (except for register names we can't modify) where KMD is written to other terms such as "Linux kernel driver" or "Host kernel driver", etc. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
351 lines
11 KiB
C
351 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2019 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef ARMCP_IF_H
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#define ARMCP_IF_H
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#include <linux/types.h>
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/*
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* EVENT QUEUE
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*/
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struct hl_eq_header {
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__le32 reserved;
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__le32 ctl;
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};
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struct hl_eq_entry {
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struct hl_eq_header hdr;
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__le64 data[7];
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};
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#define HL_EQ_ENTRY_SIZE sizeof(struct hl_eq_entry)
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#define EQ_CTL_READY_SHIFT 31
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#define EQ_CTL_READY_MASK 0x80000000
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#define EQ_CTL_EVENT_TYPE_SHIFT 16
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#define EQ_CTL_EVENT_TYPE_MASK 0x03FF0000
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enum pq_init_status {
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PQ_INIT_STATUS_NA = 0,
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PQ_INIT_STATUS_READY_FOR_CP,
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PQ_INIT_STATUS_READY_FOR_HOST
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};
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/*
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* ArmCP Primary Queue Packets
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*
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* During normal operation, the host's kernel driver needs to send various
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* messages to ArmCP, usually either to SET some value into a H/W periphery or
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* to GET the current value of some H/W periphery. For example, SET the
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* frequency of MME/TPC and GET the value of the thermal sensor.
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*
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* These messages can be initiated either by the User application or by the
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* host's driver itself, e.g. power management code. In either case, the
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* communication from the host's driver to ArmCP will *always* be in
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* synchronous mode, meaning that the host will send a single message and poll
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* until the message was acknowledged and the results are ready (if results are
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* needed).
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*
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* This means that only a single message can be sent at a time and the host's
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* driver must wait for its result before sending the next message. Having said
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* that, because these are control messages which are sent in a relatively low
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* frequency, this limitation seems acceptable. It's important to note that
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* in case of multiple devices, messages to different devices *can* be sent
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* at the same time.
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*
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* The message, inputs/outputs (if relevant) and fence object will be located
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* on the device DDR at an address that will be determined by the host's driver.
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* During device initialization phase, the host will pass to ArmCP that address.
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* Most of the message types will contain inputs/outputs inside the message
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* itself. The common part of each message will contain the opcode of the
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* message (its type) and a field representing a fence object.
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*
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* When the host's driver wishes to send a message to ArmCP, it will write the
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* message contents to the device DDR, clear the fence object and then write the
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* value 484 to the mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR register to issue
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* the 484 interrupt-id to the ARM core.
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*
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* Upon receiving the 484 interrupt-id, ArmCP will read the message from the
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* DDR. In case the message is a SET operation, ArmCP will first perform the
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* operation and then write to the fence object on the device DDR. In case the
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* message is a GET operation, ArmCP will first fill the results section on the
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* device DDR and then write to the fence object. If an error occurred, ArmCP
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* will fill the rc field with the right error code.
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*
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* In the meantime, the host's driver will poll on the fence object. Once the
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* host sees that the fence object is signaled, it will read the results from
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* the device DDR (if relevant) and resume the code execution in the host's
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* driver.
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*
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* To use QMAN packets, the opcode must be the QMAN opcode, shifted by 8
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* so the value being put by the host's driver matches the value read by ArmCP
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*
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* Non-QMAN packets should be limited to values 1 through (2^8 - 1)
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*
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* Detailed description:
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*
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* ARMCP_PACKET_DISABLE_PCI_ACCESS -
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* After receiving this packet the embedded CPU must NOT issue PCI
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* transactions (read/write) towards the Host CPU. This also include
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* sending MSI-X interrupts.
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* This packet is usually sent before the device is moved to D3Hot state.
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*
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* ARMCP_PACKET_ENABLE_PCI_ACCESS -
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* After receiving this packet the embedded CPU is allowed to issue PCI
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* transactions towards the Host CPU, including sending MSI-X interrupts.
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* This packet is usually send after the device is moved to D0 state.
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*
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* ARMCP_PACKET_TEMPERATURE_GET -
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* Fetch the current temperature / Max / Max Hyst / Critical /
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* Critical Hyst of a specified thermal sensor. The packet's
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* arguments specify the desired sensor and the field to get.
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*
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* ARMCP_PACKET_VOLTAGE_GET -
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* Fetch the voltage / Max / Min of a specified sensor. The packet's
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* arguments specify the sensor and type.
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*
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* ARMCP_PACKET_CURRENT_GET -
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* Fetch the current / Max / Min of a specified sensor. The packet's
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* arguments specify the sensor and type.
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*
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* ARMCP_PACKET_FAN_SPEED_GET -
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* Fetch the speed / Max / Min of a specified fan. The packet's
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* arguments specify the sensor and type.
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*
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* ARMCP_PACKET_PWM_GET -
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* Fetch the pwm value / mode of a specified pwm. The packet's
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* arguments specify the sensor and type.
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*
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* ARMCP_PACKET_PWM_SET -
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* Set the pwm value / mode of a specified pwm. The packet's
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* arguments specify the sensor, type and value.
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*
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* ARMCP_PACKET_FREQUENCY_SET -
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* Set the frequency of a specified PLL. The packet's arguments specify
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* the PLL and the desired frequency. The actual frequency in the device
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* might differ from the requested frequency.
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*
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* ARMCP_PACKET_FREQUENCY_GET -
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* Fetch the frequency of a specified PLL. The packet's arguments specify
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* the PLL.
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*
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* ARMCP_PACKET_LED_SET -
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* Set the state of a specified led. The packet's arguments
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* specify the led and the desired state.
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*
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* ARMCP_PACKET_I2C_WR -
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* Write 32-bit value to I2C device. The packet's arguments specify the
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* I2C bus, address and value.
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*
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* ARMCP_PACKET_I2C_RD -
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* Read 32-bit value from I2C device. The packet's arguments specify the
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* I2C bus and address.
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*
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* ARMCP_PACKET_INFO_GET -
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* Fetch information from the device as specified in the packet's
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* structure. The host's driver passes the max size it allows the ArmCP to
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* write to the structure, to prevent data corruption in case of
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* mismatched driver/FW versions.
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*
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* ARMCP_PACKET_FLASH_PROGRAM_REMOVED - this packet was removed
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*
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* ARMCP_PACKET_UNMASK_RAZWI_IRQ -
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* Unmask the given IRQ. The IRQ number is specified in the value field.
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* The packet is sent after receiving an interrupt and printing its
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* relevant information.
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*
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* ARMCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY -
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* Unmask the given IRQs. The IRQs numbers are specified in an array right
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* after the armcp_packet structure, where its first element is the array
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* length. The packet is sent after a soft reset was done in order to
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* handle any interrupts that were sent during the reset process.
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*
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* ARMCP_PACKET_TEST -
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* Test packet for ArmCP connectivity. The CPU will put the fence value
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* in the result field.
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*
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* ARMCP_PACKET_FREQUENCY_CURR_GET -
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* Fetch the current frequency of a specified PLL. The packet's arguments
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* specify the PLL.
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*
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* ARMCP_PACKET_MAX_POWER_GET -
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* Fetch the maximal power of the device.
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*
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* ARMCP_PACKET_MAX_POWER_SET -
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* Set the maximal power of the device. The packet's arguments specify
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* the power.
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*
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* ARMCP_PACKET_EEPROM_DATA_GET -
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* Get EEPROM data from the ArmCP kernel. The buffer is specified in the
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* addr field. The CPU will put the returned data size in the result
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* field. In addition, the host's driver passes the max size it allows the
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* ArmCP to write to the structure, to prevent data corruption in case of
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* mismatched driver/FW versions.
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*
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*/
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enum armcp_packet_id {
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ARMCP_PACKET_DISABLE_PCI_ACCESS = 1, /* internal */
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ARMCP_PACKET_ENABLE_PCI_ACCESS, /* internal */
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ARMCP_PACKET_TEMPERATURE_GET, /* sysfs */
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ARMCP_PACKET_VOLTAGE_GET, /* sysfs */
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ARMCP_PACKET_CURRENT_GET, /* sysfs */
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ARMCP_PACKET_FAN_SPEED_GET, /* sysfs */
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ARMCP_PACKET_PWM_GET, /* sysfs */
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ARMCP_PACKET_PWM_SET, /* sysfs */
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ARMCP_PACKET_FREQUENCY_SET, /* sysfs */
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ARMCP_PACKET_FREQUENCY_GET, /* sysfs */
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ARMCP_PACKET_LED_SET, /* debugfs */
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ARMCP_PACKET_I2C_WR, /* debugfs */
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ARMCP_PACKET_I2C_RD, /* debugfs */
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ARMCP_PACKET_INFO_GET, /* IOCTL */
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ARMCP_PACKET_FLASH_PROGRAM_REMOVED,
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ARMCP_PACKET_UNMASK_RAZWI_IRQ, /* internal */
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ARMCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY, /* internal */
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ARMCP_PACKET_TEST, /* internal */
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ARMCP_PACKET_FREQUENCY_CURR_GET, /* sysfs */
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ARMCP_PACKET_MAX_POWER_GET, /* sysfs */
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ARMCP_PACKET_MAX_POWER_SET, /* sysfs */
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ARMCP_PACKET_EEPROM_DATA_GET, /* sysfs */
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};
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#define ARMCP_PACKET_FENCE_VAL 0xFE8CE7A5
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#define ARMCP_PKT_CTL_RC_SHIFT 12
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#define ARMCP_PKT_CTL_RC_MASK 0x0000F000
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#define ARMCP_PKT_CTL_OPCODE_SHIFT 16
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#define ARMCP_PKT_CTL_OPCODE_MASK 0x1FFF0000
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struct armcp_packet {
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union {
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__le64 value; /* For SET packets */
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__le64 result; /* For GET packets */
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__le64 addr; /* For PQ */
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};
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__le32 ctl;
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__le32 fence; /* Signal to host that message is completed */
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union {
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struct {/* For temperature/current/voltage/fan/pwm get/set */
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__le16 sensor_index;
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__le16 type;
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};
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struct { /* For I2C read/write */
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__u8 i2c_bus;
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__u8 i2c_addr;
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__u8 i2c_reg;
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__u8 pad; /* unused */
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};
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/* For frequency get/set */
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__le32 pll_index;
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/* For led set */
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__le32 led_index;
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/* For get Armcp info/EEPROM data */
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__le32 data_max_size;
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};
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};
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struct armcp_unmask_irq_arr_packet {
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struct armcp_packet armcp_pkt;
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__le32 length;
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__le32 irqs[0];
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};
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enum armcp_packet_rc {
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armcp_packet_success,
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armcp_packet_invalid,
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armcp_packet_fault
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};
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enum armcp_temp_type {
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armcp_temp_input,
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armcp_temp_max = 6,
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armcp_temp_max_hyst,
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armcp_temp_crit,
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armcp_temp_crit_hyst
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};
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enum armcp_in_attributes {
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armcp_in_input,
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armcp_in_min,
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armcp_in_max
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};
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enum armcp_curr_attributes {
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armcp_curr_input,
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armcp_curr_min,
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armcp_curr_max
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};
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enum armcp_fan_attributes {
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armcp_fan_input,
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armcp_fan_min = 2,
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armcp_fan_max
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};
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enum armcp_pwm_attributes {
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armcp_pwm_input,
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armcp_pwm_enable
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};
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/* Event Queue Packets */
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struct eq_generic_event {
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__le64 data[7];
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};
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/*
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* ArmCP info
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*/
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#define CARD_NAME_MAX_LEN 16
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#define VERSION_MAX_LEN 128
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#define ARMCP_MAX_SENSORS 128
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struct armcp_sensor {
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__le32 type;
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__le32 flags;
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};
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/**
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* struct armcp_info - Info from ArmCP that is necessary to the host's driver
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* @sensors: available sensors description.
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* @kernel_version: ArmCP linux kernel version.
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* @reserved: reserved field.
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* @cpld_version: CPLD programmed F/W version.
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* @infineon_version: Infineon main DC-DC version.
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* @fuse_version: silicon production FUSE information.
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* @thermal_version: thermald S/W version.
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* @armcp_version: ArmCP S/W version.
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* @dram_size: available DRAM size.
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* @card_name: card name that will be displayed in HWMON subsystem on the host
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*/
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struct armcp_info {
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struct armcp_sensor sensors[ARMCP_MAX_SENSORS];
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__u8 kernel_version[VERSION_MAX_LEN];
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__le32 reserved[3];
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__le32 cpld_version;
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__le32 infineon_version;
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__u8 fuse_version[VERSION_MAX_LEN];
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__u8 thermal_version[VERSION_MAX_LEN];
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__u8 armcp_version[VERSION_MAX_LEN];
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__le64 dram_size;
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char card_name[CARD_NAME_MAX_LEN];
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};
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#endif /* ARMCP_IF_H */
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