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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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274e1bbdee
Mechanism of selecting physical mode in genapic when cpu hotplug is enabled on x86_64, broke the quirk(quirk_intel_irqbalance()) introduced for working around the transposing interrupt message errata in E7520/E7320/E7525 (revision ID 0x9 and below. errata #23 in http://download.intel.com/design/chipsets/specupdt/30304203.pdf). This errata requires the mode to be in logical flat, so that interrupts can be directed to more than one cpu(and thus use hardware IRQ balancing enabled by BIOS on these platforms). Following four patches fixes this by moving the quirk to early quirk and forcing the x86_64 genapic selection to logical flat on these platforms. Thanks to Shaohua for pointing out the breakage. This patch: Add write_pci_config_byte() to direct PCI access routines Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: "Li, Shaohua" <shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
60 lines
1.5 KiB
C
60 lines
1.5 KiB
C
#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <asm/pci-direct.h>
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#include <asm/io.h>
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#include "pci.h"
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/* Direct PCI access. This is used for PCI accesses in early boot before
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the PCI subsystem works. */
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#define PDprintk(x...)
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u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u32 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inl(0xcfc);
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if (v != 0xffffffff)
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PDprintk("%x reading 4 from %x: %x\n", slot, offset, v);
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return v;
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}
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u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u8 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inb(0xcfc + (offset&3));
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PDprintk("%x reading 1 from %x: %x\n", slot, offset, v);
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return v;
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}
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u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u16 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inw(0xcfc + (offset&2));
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PDprintk("%x reading 2 from %x: %x\n", slot, offset, v);
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return v;
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}
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void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset,
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u32 val)
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{
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PDprintk("%x writing to %x: %x\n", slot, offset, val);
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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outl(val, 0xcfc);
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}
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void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val)
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{
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PDprintk("%x writing to %x: %x\n", slot, offset, val);
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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outb(val, 0xcfc);
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}
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int early_pci_allowed(void)
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{
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return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) ==
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PCI_PROBE_CONF1;
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}
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