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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2c799cef4d
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
75 lines
1.5 KiB
C
75 lines
1.5 KiB
C
/*
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* clock2xxx.c - OMAP2xxx-specific clock integration code
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*
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* Copyright (C) 2005-2008 Texas Instruments, Inc.
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* Copyright (C) 2004-2010 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
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* Gordon McNutt and RidgeRun, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <plat/cpu.h>
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#include <plat/clock.h>
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#include "clock.h"
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#include "clock2xxx.h"
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#include "cm.h"
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#include "cm-regbits-24xx.h"
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struct clk *vclk, *sclk, *dclk;
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/*
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* Omap24xx specific clock functions
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*/
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/*
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* Set clocks for bypass mode for reboot to work.
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*/
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void omap2xxx_clk_prepare_for_reboot(void)
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{
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u32 rate;
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if (vclk == NULL || sclk == NULL)
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return;
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rate = clk_get_rate(sclk);
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clk_set_rate(vclk, rate);
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}
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/*
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* Switch the MPU rate if specified on cmdline. We cannot do this
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* early until cmdline is parsed. XXX This should be removed from the
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* clock code and handled by the OPP layer code in the near future.
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*/
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static int __init omap2xxx_clk_arch_init(void)
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{
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int ret;
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if (!cpu_is_omap24xx())
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return 0;
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ret = omap2_clk_switch_mpurate_at_boot("virt_prcm_set");
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if (!ret)
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omap2_clk_print_new_rates("sys_ck", "dpll_ck", "mpu_ck");
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return ret;
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}
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arch_initcall(omap2xxx_clk_arch_init);
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