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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d38ceaf99e
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
48 lines
2.2 KiB
C
48 lines
2.2 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AMDGPU_VCE_H__
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#define __AMDGPU_VCE_H__
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int amdgpu_vce_sw_init(struct amdgpu_device *adev);
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int amdgpu_vce_sw_fini(struct amdgpu_device *adev);
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int amdgpu_vce_suspend(struct amdgpu_device *adev);
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int amdgpu_vce_resume(struct amdgpu_device *adev);
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int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
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struct amdgpu_fence **fence);
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int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
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struct amdgpu_fence **fence);
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void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
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int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx, int lo, int hi);
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int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
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bool amdgpu_vce_ring_emit_semaphore(struct amdgpu_ring *ring,
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struct amdgpu_semaphore *semaphore,
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bool emit_wait);
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void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
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void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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bool write64bit);
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int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
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int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring);
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#endif
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