linux_dsm_epyc7002/arch/arm/mach-at91/Kconfig
Jean-Christophe PLAGNIOL-VILLARD 4afcd1db82 ARM: at91: rename board-dt to more specific name board-dt-sam9
We will produce a board-dt file per SoC core type. That will ease code
readability and will prevent from including superfluous code for supporting
machines that will never be compiled together (particularly the ARM9 and C-A5
upcoming SoCs).

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: modify commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-03-13 17:18:00 +01:00

161 lines
4.0 KiB
Plaintext

if ARCH_AT91
config HAVE_AT91_DBGU0
bool
config HAVE_AT91_DBGU1
bool
config AT91_SAM9_ALT_RESET
bool
default !ARCH_AT91X40
config AT91_SAM9G45_RESET
bool
default !ARCH_AT91X40
config SOC_AT91SAM9
bool
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
menu "Atmel AT91 System-on-Chip"
comment "Atmel AT91 Processor"
config SOC_AT91RM9200
bool "AT91RM9200"
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
or AT91SAM9G20 SoC.
config SOC_AT91SAM9261
bool "AT91SAM9261 or AT91SAM9G10"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
config SOC_AT91SAM9263
bool "AT91SAM9263"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
config SOC_AT91SAM9RL
bool "AT91SAM9RL"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
config SOC_AT91SAM9G45
bool "AT91SAM9G45 or AT91SAM9M10 families"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
help
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
config SOC_AT91SAM9X5
bool "AT91SAM9x5 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
This means that your SAM9 name finishes with a '5' (except if it is
AT91SAM9G45!).
This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
and AT91SAM9X35.
config SOC_AT91SAM9N12
bool "AT91SAM9N12 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
help
Select this if you are using Atmel's AT91SAM9N12 SoC.
config AT91_PMC_UNIT
bool
default !ARCH_AT91X40
# ----------------------------------------------------------
source arch/arm/mach-at91/Kconfig.non_dt
comment "Generic Board Type"
config MACH_AT91RM9200_DT
bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
depends on SOC_AT91RM9200
select USE_OF
help
Select this if you want to experiment device-tree with
an Atmel RM9200 Evaluation Kit.
config MACH_AT91SAM9_DT
bool "Atmel AT91SAM Evaluation Kits with device-tree support"
depends on SOC_AT91SAM9
select USE_OF
help
Select this if you want to experiment device-tree with
an Atmel Evaluation Kit.
# ----------------------------------------------------------
comment "AT91 Feature Selections"
config AT91_PROGRAMMABLE_CLOCKS
bool "Programmable Clocks"
help
Select this if you need to program one or more of the PCK0..PCK3
programmable clock outputs.
config AT91_SLOW_CLOCK
bool "Suspend-to-RAM disables main oscillator"
depends on SUSPEND
help
Select this if you want Suspend-to-RAM to save the most power
possible (without powering off the CPU) by disabling the PLLs
and main oscillator so that only the 32 KiHz clock is available.
When only that slow-clock is available, some peripherals lose
functionality. Many can't issue wakeup events unless faster
clocks are available. Some lose their operating state and
need to be completely re-initialized.
config AT91_TIMER_HZ
int "Kernel HZ (jiffies per second)"
range 32 1024
depends on ARCH_AT91
default "128" if ARCH_AT91RM9200
default "100"
help
On AT91rm9200 chips where you're using a system clock derived
from the 32768 Hz hardware clock, this tick rate should divide
it exactly: use a power-of-two value, such as 128 or 256, to
reduce timing errors caused by rounding.
On AT91sam926x chips, or otherwise when using a higher precision
system clock (of at least several MHz), rounding is less of a
problem so it can be safer to use a decimal values like 100.
endmenu
endif