mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 00:25:33 +07:00
1174 lines
30 KiB
C
1174 lines
30 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2008-2009 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/delay.h>
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#include "net_driver.h"
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#include "nic.h"
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#include "io.h"
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#include "regs.h"
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#include "mcdi_pcol.h"
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#include "phy.h"
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/**************************************************************************
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*
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* Management-Controller-to-Driver Interface
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*
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**************************************************************************
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*/
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/* Software-defined structure to the shared-memory */
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#define CMD_NOTIFY_PORT0 0
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#define CMD_NOTIFY_PORT1 4
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#define CMD_PDU_PORT0 0x008
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#define CMD_PDU_PORT1 0x108
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#define REBOOT_FLAG_PORT0 0x3f8
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#define REBOOT_FLAG_PORT1 0x3fc
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#define MCDI_RPC_TIMEOUT 10 /*seconds */
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#define MCDI_PDU(efx) \
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(efx_port_num(efx) ? CMD_PDU_PORT1 : CMD_PDU_PORT0)
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#define MCDI_DOORBELL(efx) \
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(efx_port_num(efx) ? CMD_NOTIFY_PORT1 : CMD_NOTIFY_PORT0)
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#define MCDI_REBOOT_FLAG(efx) \
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(efx_port_num(efx) ? REBOOT_FLAG_PORT1 : REBOOT_FLAG_PORT0)
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#define SEQ_MASK \
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EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
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static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
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{
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struct siena_nic_data *nic_data;
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EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
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nic_data = efx->nic_data;
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return &nic_data->mcdi;
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}
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void efx_mcdi_init(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi;
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if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
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return;
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mcdi = efx_mcdi(efx);
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init_waitqueue_head(&mcdi->wq);
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spin_lock_init(&mcdi->iface_lock);
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atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
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mcdi->mode = MCDI_MODE_POLL;
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(void) efx_mcdi_poll_reboot(efx);
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}
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static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
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const u8 *inbuf, size_t inlen)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
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unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
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unsigned int i;
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efx_dword_t hdr;
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u32 xflags, seqno;
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BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
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BUG_ON(inlen & 3 || inlen >= 0x100);
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seqno = mcdi->seqno & SEQ_MASK;
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xflags = 0;
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if (mcdi->mode == MCDI_MODE_EVENTS)
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xflags |= MCDI_HEADER_XFLAGS_EVREQ;
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EFX_POPULATE_DWORD_6(hdr,
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MCDI_HEADER_RESPONSE, 0,
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MCDI_HEADER_RESYNC, 1,
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MCDI_HEADER_CODE, cmd,
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MCDI_HEADER_DATALEN, inlen,
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MCDI_HEADER_SEQ, seqno,
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MCDI_HEADER_XFLAGS, xflags);
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efx_writed(efx, &hdr, pdu);
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for (i = 0; i < inlen; i += 4)
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_efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
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/* Ensure the payload is written out before the header */
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wmb();
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/* ring the doorbell with a distinctive value */
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_efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
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}
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static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
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int i;
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BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
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BUG_ON(outlen & 3 || outlen >= 0x100);
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for (i = 0; i < outlen; i += 4)
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*((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
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}
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static int efx_mcdi_poll(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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unsigned int time, finish;
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unsigned int respseq, respcmd, error;
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unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
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unsigned int rc, spins;
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efx_dword_t reg;
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/* Check for a reboot atomically with respect to efx_mcdi_copyout() */
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rc = -efx_mcdi_poll_reboot(efx);
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if (rc)
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goto out;
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/* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
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* because generally mcdi responses are fast. After that, back off
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* and poll once a jiffy (approximately)
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*/
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spins = TICK_USEC;
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finish = get_seconds() + MCDI_RPC_TIMEOUT;
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while (1) {
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if (spins != 0) {
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--spins;
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udelay(1);
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} else {
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schedule_timeout_uninterruptible(1);
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}
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time = get_seconds();
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rmb();
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efx_readd(efx, ®, pdu);
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/* All 1's indicates that shared memory is in reset (and is
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* not a valid header). Wait for it to come out reset before
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* completing the command */
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if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
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EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
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break;
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if (time >= finish)
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return -ETIMEDOUT;
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}
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mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
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respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
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respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
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error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
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if (error && mcdi->resplen == 0) {
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EFX_ERR(efx, "MC rebooted\n");
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rc = EIO;
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} else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
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EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
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respseq, mcdi->seqno);
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rc = EIO;
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} else if (error) {
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efx_readd(efx, ®, pdu + 4);
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switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
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#define TRANSLATE_ERROR(name) \
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case MC_CMD_ERR_ ## name: \
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rc = name; \
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break
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TRANSLATE_ERROR(ENOENT);
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TRANSLATE_ERROR(EINTR);
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TRANSLATE_ERROR(EACCES);
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TRANSLATE_ERROR(EBUSY);
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TRANSLATE_ERROR(EINVAL);
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TRANSLATE_ERROR(EDEADLK);
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TRANSLATE_ERROR(ENOSYS);
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TRANSLATE_ERROR(ETIME);
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#undef TRANSLATE_ERROR
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default:
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rc = EIO;
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break;
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}
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} else
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rc = 0;
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out:
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mcdi->resprc = rc;
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if (rc)
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mcdi->resplen = 0;
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/* Return rc=0 like wait_event_timeout() */
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return 0;
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}
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/* Test and clear MC-rebooted flag for this port/function */
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int efx_mcdi_poll_reboot(struct efx_nic *efx)
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{
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unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx);
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efx_dword_t reg;
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uint32_t value;
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if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
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return false;
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efx_readd(efx, ®, addr);
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value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
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if (value == 0)
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return 0;
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EFX_ZERO_DWORD(reg);
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efx_writed(efx, ®, addr);
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if (value == MC_STATUS_DWORD_ASSERT)
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return -EINTR;
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else
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return -EIO;
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}
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static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
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{
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/* Wait until the interface becomes QUIESCENT and we win the race
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* to mark it RUNNING. */
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wait_event(mcdi->wq,
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atomic_cmpxchg(&mcdi->state,
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MCDI_STATE_QUIESCENT,
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MCDI_STATE_RUNNING)
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== MCDI_STATE_QUIESCENT);
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}
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static int efx_mcdi_await_completion(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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if (wait_event_timeout(
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mcdi->wq,
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atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
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msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
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return -ETIMEDOUT;
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/* Check if efx_mcdi_set_mode() switched us back to polled completions.
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* In which case, poll for completions directly. If efx_mcdi_ev_cpl()
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* completed the request first, then we'll just end up completing the
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* request again, which is safe.
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*
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* We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
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* wait_event_timeout() implicitly provides.
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*/
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if (mcdi->mode == MCDI_MODE_POLL)
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return efx_mcdi_poll(efx);
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return 0;
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}
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static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
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{
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/* If the interface is RUNNING, then move to COMPLETED and wake any
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* waiters. If the interface isn't in RUNNING then we've received a
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* duplicate completion after we've already transitioned back to
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* QUIESCENT. [A subsequent invocation would increment seqno, so would
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* have failed the seqno check].
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*/
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if (atomic_cmpxchg(&mcdi->state,
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MCDI_STATE_RUNNING,
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MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
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wake_up(&mcdi->wq);
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return true;
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}
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return false;
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}
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static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
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{
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atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
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wake_up(&mcdi->wq);
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}
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static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
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unsigned int datalen, unsigned int errno)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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bool wake = false;
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spin_lock(&mcdi->iface_lock);
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if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
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if (mcdi->credits)
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/* The request has been cancelled */
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--mcdi->credits;
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else
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EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx "
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"seq 0x%x\n", seqno, mcdi->seqno);
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} else {
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mcdi->resprc = errno;
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mcdi->resplen = datalen;
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wake = true;
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}
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spin_unlock(&mcdi->iface_lock);
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if (wake)
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efx_mcdi_complete(mcdi);
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}
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/* Issue the given command by writing the data into the shared memory PDU,
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* ring the doorbell and wait for completion. Copyout the result. */
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int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
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const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
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size_t *outlen_actual)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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int rc;
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BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
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efx_mcdi_acquire(mcdi);
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/* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
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spin_lock_bh(&mcdi->iface_lock);
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++mcdi->seqno;
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spin_unlock_bh(&mcdi->iface_lock);
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efx_mcdi_copyin(efx, cmd, inbuf, inlen);
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if (mcdi->mode == MCDI_MODE_POLL)
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rc = efx_mcdi_poll(efx);
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else
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rc = efx_mcdi_await_completion(efx);
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if (rc != 0) {
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/* Close the race with efx_mcdi_ev_cpl() executing just too late
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* and completing a request we've just cancelled, by ensuring
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* that the seqno check therein fails.
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*/
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spin_lock_bh(&mcdi->iface_lock);
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++mcdi->seqno;
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++mcdi->credits;
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spin_unlock_bh(&mcdi->iface_lock);
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EFX_ERR(efx, "MC command 0x%x inlen %d mode %d timed out\n",
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cmd, (int)inlen, mcdi->mode);
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} else {
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size_t resplen;
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/* At the very least we need a memory barrier here to ensure
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* we pick up changes from efx_mcdi_ev_cpl(). Protect against
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* a spurious efx_mcdi_ev_cpl() running concurrently by
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* acquiring the iface_lock. */
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spin_lock_bh(&mcdi->iface_lock);
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rc = -mcdi->resprc;
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resplen = mcdi->resplen;
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spin_unlock_bh(&mcdi->iface_lock);
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if (rc == 0) {
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efx_mcdi_copyout(efx, outbuf,
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min(outlen, mcdi->resplen + 3) & ~0x3);
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if (outlen_actual != NULL)
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*outlen_actual = resplen;
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} else if (cmd == MC_CMD_REBOOT && rc == -EIO)
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; /* Don't reset if MC_CMD_REBOOT returns EIO */
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else if (rc == -EIO || rc == -EINTR) {
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EFX_ERR(efx, "MC fatal error %d\n", -rc);
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efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
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} else
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EFX_ERR(efx, "MC command 0x%x inlen %d failed rc=%d\n",
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cmd, (int)inlen, -rc);
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}
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efx_mcdi_release(mcdi);
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return rc;
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}
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void efx_mcdi_mode_poll(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi;
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if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
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return;
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mcdi = efx_mcdi(efx);
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if (mcdi->mode == MCDI_MODE_POLL)
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return;
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/* We can switch from event completion to polled completion, because
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* mcdi requests are always completed in shared memory. We do this by
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* switching the mode to POLL'd then completing the request.
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* efx_mcdi_await_completion() will then call efx_mcdi_poll().
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*
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* We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
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* which efx_mcdi_complete() provides for us.
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*/
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mcdi->mode = MCDI_MODE_POLL;
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efx_mcdi_complete(mcdi);
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}
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void efx_mcdi_mode_event(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi;
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if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
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return;
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mcdi = efx_mcdi(efx);
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if (mcdi->mode == MCDI_MODE_EVENTS)
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return;
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/* We can't switch from polled to event completion in the middle of a
|
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* request, because the completion method is specified in the request.
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* So acquire the interface to serialise the requestors. We don't need
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* to acquire the iface_lock to change the mode here, but we do need a
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* write memory barrier ensure that efx_mcdi_rpc() sees it, which
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* efx_mcdi_acquire() provides.
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*/
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efx_mcdi_acquire(mcdi);
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mcdi->mode = MCDI_MODE_EVENTS;
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efx_mcdi_release(mcdi);
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}
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|
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static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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|
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/* If there is an outstanding MCDI request, it has been terminated
|
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* either by a BADASSERT or REBOOT event. If the mcdi interface is
|
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* in polled mode, then do nothing because the MC reboot handler will
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* set the header correctly. However, if the mcdi interface is waiting
|
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* for a CMDDONE event it won't receive it [and since all MCDI events
|
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* are sent to the same queue, we can't be racing with
|
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* efx_mcdi_ev_cpl()]
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*
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* There's a race here with efx_mcdi_rpc(), because we might receive
|
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* a REBOOT event *before* the request has been copied out. In polled
|
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* mode (during startup) this is irrelevent, because efx_mcdi_complete()
|
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* is ignored. In event mode, this condition is just an edge-case of
|
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* receiving a REBOOT event after posting the MCDI request. Did the mc
|
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* reboot before or after the copyout? The best we can do always is
|
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* just return failure.
|
|
*/
|
|
spin_lock(&mcdi->iface_lock);
|
|
if (efx_mcdi_complete(mcdi)) {
|
|
if (mcdi->mode == MCDI_MODE_EVENTS) {
|
|
mcdi->resprc = rc;
|
|
mcdi->resplen = 0;
|
|
}
|
|
} else
|
|
/* Nobody was waiting for an MCDI request, so trigger a reset */
|
|
efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
|
|
|
|
spin_unlock(&mcdi->iface_lock);
|
|
}
|
|
|
|
static unsigned int efx_mcdi_event_link_speed[] = {
|
|
[MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
|
|
[MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
|
|
[MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
|
|
};
|
|
|
|
|
|
static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
|
|
{
|
|
u32 flags, fcntl, speed, lpa;
|
|
|
|
speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
|
|
EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
|
|
speed = efx_mcdi_event_link_speed[speed];
|
|
|
|
flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
|
|
fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
|
|
lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
|
|
|
|
/* efx->link_state is only modified by efx_mcdi_phy_get_link(),
|
|
* which is only run after flushing the event queues. Therefore, it
|
|
* is safe to modify the link state outside of the mac_lock here.
|
|
*/
|
|
efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
|
|
|
|
efx_mcdi_phy_check_fcntl(efx, lpa);
|
|
|
|
efx_link_status_changed(efx);
|
|
}
|
|
|
|
static const char *sensor_names[] = {
|
|
[MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor",
|
|
[MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor",
|
|
[MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling",
|
|
[MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor",
|
|
[MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling",
|
|
[MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor",
|
|
[MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling",
|
|
[MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor",
|
|
[MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor",
|
|
[MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor",
|
|
[MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor",
|
|
[MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor",
|
|
[MC_CMD_SENSOR_IN_12V0] = "12V supply sensor"
|
|
};
|
|
|
|
static const char *sensor_status_names[] = {
|
|
[MC_CMD_SENSOR_STATE_OK] = "OK",
|
|
[MC_CMD_SENSOR_STATE_WARNING] = "Warning",
|
|
[MC_CMD_SENSOR_STATE_FATAL] = "Fatal",
|
|
[MC_CMD_SENSOR_STATE_BROKEN] = "Device failure",
|
|
};
|
|
|
|
static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev)
|
|
{
|
|
unsigned int monitor, state, value;
|
|
const char *name, *state_txt;
|
|
monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR);
|
|
state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE);
|
|
value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE);
|
|
/* Deal gracefully with the board having more drivers than we
|
|
* know about, but do not expect new sensor states. */
|
|
name = (monitor >= ARRAY_SIZE(sensor_names))
|
|
? "No sensor name available" :
|
|
sensor_names[monitor];
|
|
EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names));
|
|
state_txt = sensor_status_names[state];
|
|
|
|
EFX_ERR(efx, "Sensor %d (%s) reports condition '%s' for raw value %d\n",
|
|
monitor, name, state_txt, value);
|
|
}
|
|
|
|
/* Called from falcon_process_eventq for MCDI events */
|
|
void efx_mcdi_process_event(struct efx_channel *channel,
|
|
efx_qword_t *event)
|
|
{
|
|
struct efx_nic *efx = channel->efx;
|
|
int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
|
|
u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
|
|
|
|
switch (code) {
|
|
case MCDI_EVENT_CODE_BADSSERT:
|
|
EFX_ERR(efx, "MC watchdog or assertion failure at 0x%x\n", data);
|
|
efx_mcdi_ev_death(efx, EINTR);
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_PMNOTICE:
|
|
EFX_INFO(efx, "MCDI PM event.\n");
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_CMDDONE:
|
|
efx_mcdi_ev_cpl(efx,
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_LINKCHANGE:
|
|
efx_mcdi_process_link_change(efx, event);
|
|
break;
|
|
case MCDI_EVENT_CODE_SENSOREVT:
|
|
efx_mcdi_sensor_event(efx, event);
|
|
break;
|
|
case MCDI_EVENT_CODE_SCHEDERR:
|
|
EFX_INFO(efx, "MC Scheduler error address=0x%x\n", data);
|
|
break;
|
|
case MCDI_EVENT_CODE_REBOOT:
|
|
EFX_INFO(efx, "MC Reboot\n");
|
|
efx_mcdi_ev_death(efx, EIO);
|
|
break;
|
|
case MCDI_EVENT_CODE_MAC_STATS_DMA:
|
|
/* MAC stats are gather lazily. We can ignore this. */
|
|
break;
|
|
|
|
default:
|
|
EFX_ERR(efx, "Unknown MCDI event 0x%x\n", code);
|
|
}
|
|
}
|
|
|
|
/**************************************************************************
|
|
*
|
|
* Specific request functions
|
|
*
|
|
**************************************************************************
|
|
*/
|
|
|
|
int efx_mcdi_fwver(struct efx_nic *efx, u64 *version, u32 *build)
|
|
{
|
|
u8 outbuf[ALIGN(MC_CMD_GET_VERSION_V1_OUT_LEN, 4)];
|
|
size_t outlength;
|
|
const __le16 *ver_words;
|
|
int rc;
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
|
|
outbuf, sizeof(outbuf), &outlength);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
if (outlength == MC_CMD_GET_VERSION_V0_OUT_LEN) {
|
|
*version = 0;
|
|
*build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
|
|
return 0;
|
|
}
|
|
|
|
if (outlength < MC_CMD_GET_VERSION_V1_OUT_LEN) {
|
|
rc = -EMSGSIZE;
|
|
goto fail;
|
|
}
|
|
|
|
ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
|
|
*version = (((u64)le16_to_cpu(ver_words[0]) << 48) |
|
|
((u64)le16_to_cpu(ver_words[1]) << 32) |
|
|
((u64)le16_to_cpu(ver_words[2]) << 16) |
|
|
le16_to_cpu(ver_words[3]));
|
|
*build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
|
|
bool *was_attached)
|
|
{
|
|
u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
|
|
u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
|
|
driver_operating ? 1 : 0);
|
|
MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN)
|
|
goto fail;
|
|
|
|
if (was_attached != NULL)
|
|
*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
|
|
u16 *fw_subtype_list)
|
|
{
|
|
uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LEN];
|
|
size_t outlen;
|
|
int port_num = efx_port_num(efx);
|
|
int offset;
|
|
int rc;
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LEN) {
|
|
rc = -EMSGSIZE;
|
|
goto fail;
|
|
}
|
|
|
|
offset = (port_num)
|
|
? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
|
|
: MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
|
|
if (mac_address)
|
|
memcpy(mac_address, outbuf + offset, ETH_ALEN);
|
|
if (fw_subtype_list)
|
|
memcpy(fw_subtype_list,
|
|
outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
|
|
MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d len=%d\n", __func__, rc, (int)outlen);
|
|
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
|
|
{
|
|
u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
|
|
u32 dest = 0;
|
|
int rc;
|
|
|
|
if (uart)
|
|
dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
|
|
if (evq)
|
|
dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
|
|
|
|
MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
|
|
MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
|
|
|
|
BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
|
|
{
|
|
u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN)
|
|
goto fail;
|
|
|
|
*nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n",
|
|
__func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
|
|
size_t *size_out, size_t *erase_size_out,
|
|
bool *protected_out)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
|
|
u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN)
|
|
goto fail;
|
|
|
|
*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
|
|
*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
|
|
*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
|
|
(1 << MC_CMD_NVRAM_PROTECTED_LBN));
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
|
|
loff_t offset, u8 *buffer, size_t length)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
|
|
u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
|
|
loff_t offset, const u8 *buffer, size_t length)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
|
|
memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
|
|
ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
|
|
loff_t offset, size_t length)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
|
|
{
|
|
u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN];
|
|
u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
|
|
outbuf, sizeof(outbuf), NULL);
|
|
if (rc)
|
|
return rc;
|
|
|
|
switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
|
|
case MC_CMD_NVRAM_TEST_PASS:
|
|
case MC_CMD_NVRAM_TEST_NOTSUPP:
|
|
return 0;
|
|
default:
|
|
return -EIO;
|
|
}
|
|
}
|
|
|
|
int efx_mcdi_nvram_test_all(struct efx_nic *efx)
|
|
{
|
|
u32 nvram_types;
|
|
unsigned int type;
|
|
int rc;
|
|
|
|
rc = efx_mcdi_nvram_types(efx, &nvram_types);
|
|
if (rc)
|
|
return rc;
|
|
|
|
type = 0;
|
|
while (nvram_types != 0) {
|
|
if (nvram_types & 1) {
|
|
rc = efx_mcdi_nvram_test(efx, type);
|
|
if (rc)
|
|
return rc;
|
|
}
|
|
type++;
|
|
nvram_types >>= 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int efx_mcdi_read_assertion(struct efx_nic *efx)
|
|
{
|
|
u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN];
|
|
u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN];
|
|
unsigned int flags, index, ofst;
|
|
const char *reason;
|
|
size_t outlen;
|
|
int retry;
|
|
int rc;
|
|
|
|
/* Attempt to read any stored assertion state before we reboot
|
|
* the mcfw out of the assertion handler. Retry twice, once
|
|
* because a boot-time assertion might cause this command to fail
|
|
* with EINTR. And once again because GET_ASSERTS can race with
|
|
* MC_CMD_REBOOT running on the other port. */
|
|
retry = 2;
|
|
do {
|
|
MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
|
|
inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
} while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
|
|
|
|
if (rc)
|
|
return rc;
|
|
if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
|
|
return -EINVAL;
|
|
|
|
/* Print out any recorded assertion state */
|
|
flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
|
|
if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
|
|
return 0;
|
|
|
|
reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
|
|
? "system-level assertion"
|
|
: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
|
|
? "thread-level assertion"
|
|
: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
|
|
? "watchdog reset"
|
|
: "unknown assertion";
|
|
EFX_ERR(efx, "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
|
|
MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
|
|
MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
|
|
|
|
/* Print out the registers */
|
|
ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
|
|
for (index = 1; index < 32; index++) {
|
|
EFX_ERR(efx, "R%.2d (?): 0x%.8x\n", index,
|
|
MCDI_DWORD2(outbuf, ofst));
|
|
ofst += sizeof(efx_dword_t);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void efx_mcdi_exit_assertion(struct efx_nic *efx)
|
|
{
|
|
u8 inbuf[MC_CMD_REBOOT_IN_LEN];
|
|
|
|
/* Atomically reboot the mcfw out of the assertion handler */
|
|
BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
|
|
MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
|
|
MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
|
|
efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
|
|
NULL, 0, NULL);
|
|
}
|
|
|
|
int efx_mcdi_handle_assertion(struct efx_nic *efx)
|
|
{
|
|
int rc;
|
|
|
|
rc = efx_mcdi_read_assertion(efx);
|
|
if (rc)
|
|
return rc;
|
|
|
|
efx_mcdi_exit_assertion(efx);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
|
|
{
|
|
u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
|
|
int rc;
|
|
|
|
BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
|
|
BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
|
|
BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
|
|
|
|
BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
|
|
|
|
MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
}
|
|
|
|
int efx_mcdi_reset_port(struct efx_nic *efx)
|
|
{
|
|
int rc = efx_mcdi_rpc(efx, MC_CMD_PORT_RESET, NULL, 0, NULL, 0, NULL);
|
|
if (rc)
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_reset_mc(struct efx_nic *efx)
|
|
{
|
|
u8 inbuf[MC_CMD_REBOOT_IN_LEN];
|
|
int rc;
|
|
|
|
BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
|
|
MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
/* White is black, and up is down */
|
|
if (rc == -EIO)
|
|
return 0;
|
|
if (rc == 0)
|
|
rc = -EIO;
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
|
|
const u8 *mac, int *id_out)
|
|
{
|
|
u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
|
|
u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
|
|
MC_CMD_FILTER_MODE_SIMPLE);
|
|
memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
|
|
rc = -EMSGSIZE;
|
|
goto fail;
|
|
}
|
|
|
|
*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
*id_out = -1;
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
int
|
|
efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
|
|
{
|
|
return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
|
|
}
|
|
|
|
|
|
int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
|
|
{
|
|
u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
|
|
size_t outlen;
|
|
int rc;
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
|
|
rc = -EMSGSIZE;
|
|
goto fail;
|
|
}
|
|
|
|
*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
*id_out = -1;
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
|
|
int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
|
|
{
|
|
u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
|
|
int rc;
|
|
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
|
|
NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|
|
|
|
int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
|
|
{
|
|
int rc;
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
|
|
if (rc)
|
|
goto fail;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
|
|
return rc;
|
|
}
|
|
|