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703ef76b8f
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
Fixes: fd45a136ff6 ("ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
40 lines
1.0 KiB
ArmAsm
40 lines
1.0 KiB
ArmAsm
/*
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* SMP support for APMU based systems with Cortex A7/A15
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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ENTRY(shmobile_init_cntvoff)
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/*
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* CNTVOFF has to be initialized either from non-secure Hypervisor
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* mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
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* then it should be handled by the secure code
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*/
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cps #MON_MODE
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mrc p15, 0, r1, c1, c1, 0 /* Get Secure Config */
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orr r0, r1, #1
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mcr p15, 0, r0, c1, c1, 0 /* Set Non Secure bit */
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instr_sync
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mov r0, #0
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mcrr p15, 4, r0, r0, c14 /* CNTVOFF = 0 */
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instr_sync
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mcr p15, 0, r1, c1, c1, 0 /* Set Secure bit */
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instr_sync
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cps #SVC_MODE
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ret lr
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ENDPROC(shmobile_init_cntvoff)
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#ifdef CONFIG_SMP
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ENTRY(shmobile_boot_apmu)
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bl shmobile_init_cntvoff
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b secondary_startup
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ENDPROC(shmobile_boot_apmu)
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#endif
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