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49727d30ea
This patch adds the APB_MISC_GP_MIPI_PAD_CTRL_0 as a pin-control bank on Tegra124 so the new MIPI pad control group can be muxed between CSI and DSI_B. Signed-off-by: Sean Paul <seanpaul@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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