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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
215 lines
4.2 KiB
Plaintext
215 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* GE SBC610 Device Tree Source
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*
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* Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
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*
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* Based on: SBS CM6 Device Tree Source
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* Copyright 2007 SBS Technologies GmbH & Co. KG
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* And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
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* Copyright 2006 Freescale Semiconductor Inc.
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*/
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/*
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* Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
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*/
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/include/ "mpc8641si-pre.dtsi"
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/ {
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model = "GEF_SBC610";
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compatible = "gef,sbc610";
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memory {
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device_type = "memory";
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reg = <0x0 0x40000000>; // set by uboot
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};
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lbc: localbus@fef05000 {
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reg = <0xfef05000 0x1000>;
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ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
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1 0 0xe8000000 0x08000000 // Paged Flash 0
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2 0 0xe0000000 0x08000000 // Paged Flash 1
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3 0 0xfc100000 0x00020000 // NVRAM
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4 0 0xfc000000 0x00008000 // FPGA
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5 0 0xfc008000 0x00008000 // AFIX FPGA
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6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
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7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
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/* flash@0,0 is a mirror of part of the memory in flash@1,0
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flash@0,0 {
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compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
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reg = <0x0 0x0 0x1000000>;
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bank-width = <4>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "firmware";
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reg = <0x0 0x1000000>;
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read-only;
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};
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};
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*/
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flash@1,0 {
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compatible = "gef,sbc610-paged-flash", "cfi-flash";
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reg = <0x1 0x0 0x8000000>;
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bank-width = <4>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "user";
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reg = <0x0 0x7800000>;
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};
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partition@7800000 {
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label = "firmware";
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reg = <0x7800000 0x800000>;
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read-only;
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};
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};
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nvram@3,0 {
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device_type = "nvram";
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compatible = "simtek,stk14ca8";
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reg = <0x3 0x0 0x20000>;
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};
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fpga@4,0 {
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compatible = "gef,fpga-regs";
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reg = <0x4 0x0 0x40>;
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};
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wdt@4,2000 {
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compatible = "gef,fpga-wdt";
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reg = <0x4 0x2000 0x8>;
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interrupts = <0x1a 0x4>;
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interrupt-parent = <&gef_pic>;
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};
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/* Second watchdog available, driver currently supports one.
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wdt@4,2010 {
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compatible = "gef,fpga-wdt";
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reg = <0x4 0x2010 0x8>;
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interrupts = <0x1b 0x4>;
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interrupt-parent = <&gef_pic>;
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};
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*/
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gef_pic: pic@4,4000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "gef,fpga-pic";
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reg = <0x4 0x4000 0x20>;
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interrupts = <0x8 0x9 0 0>;
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};
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gef_gpio: gpio@7,14000 {
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#gpio-cells = <2>;
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compatible = "gef,sbc610-gpio";
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reg = <0x7 0x14000 0x24>;
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gpio-controller;
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};
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};
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soc: soc@fef00000 {
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ranges = <0x0 0xfef00000 0x00100000>;
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i2c@3000 {
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hwmon@48 {
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compatible = "national,lm92";
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reg = <0x48>;
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};
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hwmon@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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rtc@51 {
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compatible = "epson,rx8581";
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reg = <0x00000051>;
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};
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eti@6b {
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compatible = "dallas,ds1682";
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reg = <0x6b>;
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};
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};
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enet0: ethernet@24000 {
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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phy-connection-type = "gmii";
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};
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mdio@24520 {
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phy0: ethernet-phy@0 {
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interrupt-parent = <&gef_pic>;
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interrupts = <0x9 0x4>;
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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interrupt-parent = <&gef_pic>;
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interrupts = <0x8 0x4>;
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reg = <3>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet1: ethernet@26000 {
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tbi-handle = <&tbi2>;
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phy-handle = <&phy2>;
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phy-connection-type = "gmii";
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};
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mdio@26520 {
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tbi2: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet2: ethernet@25000 {
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status = "disabled";
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};
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mdio@25520 {
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status = "disabled";
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};
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enet3: ethernet@27000 {
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status = "disabled";
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};
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mdio@27520 {
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status = "disabled";
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};
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};
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pci0: pcie@fef08000 {
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reg = <0xfef08000 0x1000>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
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0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
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pcie@0 {
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ranges = <0x02000000 0x0 0x80000000
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0x02000000 0x0 0x80000000
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0x0 0x40000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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0x0 0x00400000>;
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};
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};
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pci1: pcie@fef09000 {
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status = "disabled";
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};
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};
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/include/ "mpc8641si-post.dtsi"
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