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In low power modes, the chip clock source for platform integrated devices is 32kHz. It is generated internally and supplied by a crystal oscillator. However using a 32kHz sourced from crystal oscillator has high power penalty. There is an option to get an external 32kHz clock from the platform. Past experience shows that the reliability is platform dependent, i.e. on some platforms it works good and on other it doesn’t. Working from external clock will save 0.5 mW in sleep state, from overall 1.8mW that we have today, i.e. almost 30%. Each OEM can enable or disable the use of the external 32kHz clock by setting a BIOS configuration. In case the OEM configured to use 32kHz external clock the driver will pass this indication to the FW. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> |
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| admtek | ||
| ath | ||
| atmel | ||
| broadcom | ||
| cisco | ||
| intel | ||
| intersil | ||
| marvell | ||
| mediatek | ||
| quantenna | ||
| ralink | ||
| realtek | ||
| rsi | ||
| st | ||
| ti | ||
| zydas | ||
| Kconfig | ||
| mac80211_hwsim.c | ||
| mac80211_hwsim.h | ||
| Makefile | ||
| ray_cs.c | ||
| ray_cs.h | ||
| rayctl.h | ||
| rndis_wlan.c | ||
| virt_wifi.c | ||
| wl3501_cs.c | ||
| wl3501.h | ||