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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 17:38:56 +07:00
b4178ab58a
paride_register() returns 1 on success, 0 on failure and module init
code looks like
static int __init foo_init(void)
{
return paride_register(&foo) - 1;
}
which is not what one get used to. Converted to usual 0/-E convention.
In case of kbic driver, unwind registration. It was just
return (paride_register(&k951)||paride_register(&k971))-1;
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
478 lines
9.3 KiB
C
478 lines
9.3 KiB
C
/*
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bpck.c (c) 1996-8 Grant R. Guenther <grant@torque.net>
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Under the terms of the GNU General Public License.
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bpck.c is a low-level protocol driver for the MicroSolutions
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"backpack" parallel port IDE adapter.
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*/
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/* Changes:
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1.01 GRG 1998.05.05 init_proto, release_proto, pi->delay
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1.02 GRG 1998.08.15 default pi->delay returned to 4
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*/
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#define BPCK_VERSION "1.02"
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include "paride.h"
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#undef r2
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#undef w2
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#define PC pi->private
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#define r2() (PC=(in_p(2) & 0xff))
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#define w2(byte) {out_p(2,byte); PC = byte;}
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#define t2(pat) {PC ^= pat; out_p(2,PC);}
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#define e2() {PC &= 0xfe; out_p(2,PC);}
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#define o2() {PC |= 1; out_p(2,PC);}
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#define j44(l,h) (((l>>3)&0x7)|((l>>4)&0x8)|((h<<1)&0x70)|(h&0x80))
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/* cont = 0 - access the IDE register file
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cont = 1 - access the IDE command set
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cont = 2 - use internal bpck register addressing
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*/
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static int cont_map[3] = { 0x40, 0x48, 0 };
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static int bpck_read_regr( PIA *pi, int cont, int regr )
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{ int r, l, h;
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r = regr + cont_map[cont];
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switch (pi->mode) {
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case 0: w0(r & 0xf); w0(r); t2(2); t2(4);
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l = r1();
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t2(4);
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h = r1();
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return j44(l,h);
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case 1: w0(r & 0xf); w0(r); t2(2);
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e2(); t2(0x20);
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t2(4); h = r0();
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t2(1); t2(0x20);
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return h;
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case 2:
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case 3:
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case 4: w0(r); w2(9); w2(0); w2(0x20);
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h = r4();
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w2(0);
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return h;
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}
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return -1;
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}
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static void bpck_write_regr( PIA *pi, int cont, int regr, int val )
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{ int r;
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r = regr + cont_map[cont];
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switch (pi->mode) {
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case 0:
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case 1: w0(r);
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t2(2);
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w0(val);
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o2(); t2(4); t2(1);
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break;
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case 2:
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case 3:
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case 4: w0(r); w2(9); w2(0);
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w0(val); w2(1); w2(3); w2(0);
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break;
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}
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}
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/* These macros access the bpck registers in native addressing */
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#define WR(r,v) bpck_write_regr(pi,2,r,v)
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#define RR(r) (bpck_read_regr(pi,2,r))
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static void bpck_write_block( PIA *pi, char * buf, int count )
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{ int i;
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switch (pi->mode) {
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case 0: WR(4,0x40);
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w0(0x40); t2(2); t2(1);
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for (i=0;i<count;i++) { w0(buf[i]); t2(4); }
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WR(4,0);
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break;
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case 1: WR(4,0x50);
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w0(0x40); t2(2); t2(1);
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for (i=0;i<count;i++) { w0(buf[i]); t2(4); }
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WR(4,0x10);
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break;
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case 2: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(1);
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for (i=0;i<count;i++) w4(buf[i]);
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w2(0);
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WR(4,8);
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break;
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case 3: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(1);
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for (i=0;i<count/2;i++) w4w(((u16 *)buf)[i]);
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w2(0);
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WR(4,8);
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break;
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case 4: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(1);
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for (i=0;i<count/4;i++) w4l(((u32 *)buf)[i]);
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w2(0);
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WR(4,8);
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break;
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}
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}
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static void bpck_read_block( PIA *pi, char * buf, int count )
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{ int i, l, h;
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switch (pi->mode) {
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case 0: WR(4,0x40);
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w0(0x40); t2(2);
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for (i=0;i<count;i++) {
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t2(4); l = r1();
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t2(4); h = r1();
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buf[i] = j44(l,h);
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}
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WR(4,0);
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break;
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case 1: WR(4,0x50);
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w0(0x40); t2(2); t2(0x20);
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for(i=0;i<count;i++) { t2(4); buf[i] = r0(); }
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t2(1); t2(0x20);
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WR(4,0x10);
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break;
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case 2: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(0x20);
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for (i=0;i<count;i++) buf[i] = r4();
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w2(0);
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WR(4,8);
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break;
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case 3: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(0x20);
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for (i=0;i<count/2;i++) ((u16 *)buf)[i] = r4w();
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w2(0);
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WR(4,8);
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break;
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case 4: WR(4,0x48);
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w0(0x40); w2(9); w2(0); w2(0x20);
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for (i=0;i<count/4;i++) ((u32 *)buf)[i] = r4l();
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w2(0);
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WR(4,8);
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break;
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}
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}
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static int bpck_probe_unit ( PIA *pi )
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{ int o1, o0, f7, id;
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int t, s;
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id = pi->unit;
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s = 0;
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w2(4); w2(0xe); r2(); t2(2);
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o1 = r1()&0xf8;
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o0 = r0();
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w0(255-id); w2(4); w0(id);
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t2(8); t2(8); t2(8);
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t2(2); t = r1()&0xf8;
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f7 = ((id % 8) == 7);
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if ((f7) || (t != o1)) { t2(2); s = r1()&0xf8; }
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if ((t == o1) && ((!f7) || (s == o1))) {
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w2(0x4c); w0(o0);
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return 0;
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}
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t2(8); w0(0); t2(2); w2(0x4c); w0(o0);
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return 1;
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}
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static void bpck_connect ( PIA *pi )
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{ pi->saved_r0 = r0();
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w0(0xff-pi->unit); w2(4); w0(pi->unit);
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t2(8); t2(8); t2(8);
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t2(2); t2(2);
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switch (pi->mode) {
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case 0: t2(8); WR(4,0);
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break;
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case 1: t2(8); WR(4,0x10);
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break;
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case 2:
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case 3:
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case 4: w2(0); WR(4,8);
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break;
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}
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WR(5,8);
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if (pi->devtype == PI_PCD) {
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WR(0x46,0x10); /* fiddle with ESS logic ??? */
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WR(0x4c,0x38);
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WR(0x4d,0x88);
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WR(0x46,0xa0);
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WR(0x41,0);
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WR(0x4e,8);
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}
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}
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static void bpck_disconnect ( PIA *pi )
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{ w0(0);
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if (pi->mode >= 2) { w2(9); w2(0); } else t2(2);
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w2(0x4c); w0(pi->saved_r0);
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}
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static void bpck_force_spp ( PIA *pi )
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/* This fakes the EPP protocol to turn off EPP ... */
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{ pi->saved_r0 = r0();
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w0(0xff-pi->unit); w2(4); w0(pi->unit);
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t2(8); t2(8); t2(8);
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t2(2); t2(2);
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w2(0);
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w0(4); w2(9); w2(0);
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w0(0); w2(1); w2(3); w2(0);
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w0(0); w2(9); w2(0);
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w2(0x4c); w0(pi->saved_r0);
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}
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#define TEST_LEN 16
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static int bpck_test_proto( PIA *pi, char * scratch, int verbose )
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{ int i, e, l, h, om;
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char buf[TEST_LEN];
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bpck_force_spp(pi);
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switch (pi->mode) {
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case 0: bpck_connect(pi);
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WR(0x13,0x7f);
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w0(0x13); t2(2);
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for(i=0;i<TEST_LEN;i++) {
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t2(4); l = r1();
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t2(4); h = r1();
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buf[i] = j44(l,h);
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}
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bpck_disconnect(pi);
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break;
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case 1: bpck_connect(pi);
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WR(0x13,0x7f);
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w0(0x13); t2(2); t2(0x20);
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for(i=0;i<TEST_LEN;i++) { t2(4); buf[i] = r0(); }
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t2(1); t2(0x20);
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bpck_disconnect(pi);
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break;
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case 2:
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case 3:
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case 4: om = pi->mode;
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pi->mode = 0;
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bpck_connect(pi);
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WR(7,3);
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WR(4,8);
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bpck_disconnect(pi);
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pi->mode = om;
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bpck_connect(pi);
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w0(0x13); w2(9); w2(1); w0(0); w2(3); w2(0); w2(0xe0);
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switch (pi->mode) {
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case 2: for (i=0;i<TEST_LEN;i++) buf[i] = r4();
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break;
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case 3: for (i=0;i<TEST_LEN/2;i++) ((u16 *)buf)[i] = r4w();
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break;
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case 4: for (i=0;i<TEST_LEN/4;i++) ((u32 *)buf)[i] = r4l();
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break;
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}
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w2(0);
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WR(7,0);
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bpck_disconnect(pi);
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break;
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}
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if (verbose) {
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printk("%s: bpck: 0x%x unit %d mode %d: ",
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pi->device,pi->port,pi->unit,pi->mode);
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for (i=0;i<TEST_LEN;i++) printk("%3d",buf[i]);
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printk("\n");
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}
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e = 0;
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for (i=0;i<TEST_LEN;i++) if (buf[i] != (i+1)) e++;
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return e;
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}
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static void bpck_read_eeprom ( PIA *pi, char * buf )
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{ int i,j,k,n,p,v,f, om, od;
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bpck_force_spp(pi);
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om = pi->mode; od = pi->delay;
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pi->mode = 0; pi->delay = 6;
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bpck_connect(pi);
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n = 0;
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WR(4,0);
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for (i=0;i<64;i++) {
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WR(6,8);
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WR(6,0xc);
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p = 0x100;
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for (k=0;k<9;k++) {
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f = (((i + 0x180) & p) != 0) * 2;
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WR(6,f+0xc);
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WR(6,f+0xd);
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WR(6,f+0xc);
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p = (p >> 1);
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}
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for (j=0;j<2;j++) {
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v = 0;
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for (k=0;k<8;k++) {
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WR(6,0xc);
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WR(6,0xd);
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WR(6,0xc);
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f = RR(0);
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v = 2*v + (f == 0x84);
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}
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buf[2*i+1-j] = v;
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}
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}
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WR(6,8);
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WR(6,0);
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WR(5,8);
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bpck_disconnect(pi);
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if (om >= 2) {
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bpck_connect(pi);
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WR(7,3);
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WR(4,8);
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bpck_disconnect(pi);
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}
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pi->mode = om; pi->delay = od;
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}
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static int bpck_test_port ( PIA *pi ) /* check for 8-bit port */
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{ int i, r, m;
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w2(0x2c); i = r0(); w0(255-i); r = r0(); w0(i);
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m = -1;
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if (r == i) m = 2;
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if (r == (255-i)) m = 0;
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w2(0xc); i = r0(); w0(255-i); r = r0(); w0(i);
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if (r != (255-i)) m = -1;
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if (m == 0) { w2(6); w2(0xc); r = r0(); w0(0xaa); w0(r); w0(0xaa); }
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if (m == 2) { w2(0x26); w2(0xc); }
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if (m == -1) return 0;
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return 5;
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}
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static void bpck_log_adapter( PIA *pi, char * scratch, int verbose )
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{ char *mode_string[5] = { "4-bit","8-bit","EPP-8",
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"EPP-16","EPP-32" };
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#ifdef DUMP_EEPROM
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int i;
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#endif
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bpck_read_eeprom(pi,scratch);
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#ifdef DUMP_EEPROM
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if (verbose) {
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for(i=0;i<128;i++)
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if ((scratch[i] < ' ') || (scratch[i] > '~'))
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scratch[i] = '.';
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printk("%s: bpck EEPROM: %64.64s\n",pi->device,scratch);
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printk("%s: %64.64s\n",pi->device,&scratch[64]);
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}
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#endif
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printk("%s: bpck %s, backpack %8.8s unit %d",
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pi->device,BPCK_VERSION,&scratch[110],pi->unit);
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printk(" at 0x%x, mode %d (%s), delay %d\n",pi->port,
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pi->mode,mode_string[pi->mode],pi->delay);
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}
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static struct pi_protocol bpck = {
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.owner = THIS_MODULE,
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.name = "bpck",
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.max_mode = 5,
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.epp_first = 2,
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.default_delay = 4,
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.max_units = 255,
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.write_regr = bpck_write_regr,
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.read_regr = bpck_read_regr,
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.write_block = bpck_write_block,
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.read_block = bpck_read_block,
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.connect = bpck_connect,
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.disconnect = bpck_disconnect,
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.test_port = bpck_test_port,
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.probe_unit = bpck_probe_unit,
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.test_proto = bpck_test_proto,
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.log_adapter = bpck_log_adapter,
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};
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static int __init bpck_init(void)
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{
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return paride_register(&bpck);
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}
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static void __exit bpck_exit(void)
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{
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paride_unregister(&bpck);
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}
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MODULE_LICENSE("GPL");
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module_init(bpck_init)
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module_exit(bpck_exit)
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