linux_dsm_epyc7002/drivers/net/ethernet/stmicro/stmmac/dwmac5.h
Jose Abreu 9a8a02c9d4 net: stmmac: Add Flexible PPS support
This adds support for Flexible PPS output (which is equivalent
to per_out output of PTP subsystem).

Tested using an oscilloscope and the following commands:

1) Start PTP4L:
	# ptp4l -A -4 -H -m -i eth0 &
2) Set Flexible PPS frequency:
	# echo <idx> <ts> <tns> <ps> <pns> > /sys/class/ptp/ptpX/period

Where, ts/tns is start time and ps/pns is period time, and ptpX is ptp
of eth0.

Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: Vitor Soares <soares@synopsys.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-06-04 10:13:16 -04:00

88 lines
2.8 KiB
C

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// Copyright (c) 2017 Synopsys, Inc. and/or its affiliates.
// stmmac Support for 5.xx Ethernet QoS cores
#ifndef __DWMAC5_H__
#define __DWMAC5_H__
#define MAC_DPP_FSM_INT_STATUS 0x00000140
#define MAC_AXI_SLV_DPE_ADDR_STATUS 0x00000144
#define MAC_FSM_CONTROL 0x00000148
#define PRTYEN BIT(1)
#define TMOUTEN BIT(0)
#define MAC_PPS_CONTROL 0x00000b70
#define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1)
#define PPS_MINIDX(x) ((x) * 8)
#define PPSx_MASK(x) GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x))
#define MCGRENx(x) BIT(PPS_MAXIDX(x))
#define TRGTMODSELx(x, val) \
GENMASK(PPS_MAXIDX(x) - 1, PPS_MAXIDX(x) - 2) & \
((val) << (PPS_MAXIDX(x) - 2))
#define PPSCMDx(x, val) \
GENMASK(PPS_MINIDX(x) + 3, PPS_MINIDX(x)) & \
((val) << PPS_MINIDX(x))
#define PPSEN0 BIT(4)
#define MAC_PPSx_TARGET_TIME_SEC(x) (0x00000b80 + ((x) * 0x10))
#define MAC_PPSx_TARGET_TIME_NSEC(x) (0x00000b84 + ((x) * 0x10))
#define TRGTBUSY0 BIT(31)
#define TTSL0 GENMASK(30, 0)
#define MAC_PPSx_INTERVAL(x) (0x00000b88 + ((x) * 0x10))
#define MAC_PPSx_WIDTH(x) (0x00000b8c + ((x) * 0x10))
#define MTL_RXP_CONTROL_STATUS 0x00000ca0
#define RXPI BIT(31)
#define NPE GENMASK(23, 16)
#define NVE GENMASK(7, 0)
#define MTL_RXP_IACC_CTRL_STATUS 0x00000cb0
#define STARTBUSY BIT(31)
#define RXPEIEC GENMASK(22, 21)
#define RXPEIEE BIT(20)
#define WRRDN BIT(16)
#define ADDR GENMASK(15, 0)
#define MTL_RXP_IACC_DATA 0x00000cb4
#define MTL_ECC_CONTROL 0x00000cc0
#define TSOEE BIT(4)
#define MRXPEE BIT(3)
#define MESTEE BIT(2)
#define MRXEE BIT(1)
#define MTXEE BIT(0)
#define MTL_SAFETY_INT_STATUS 0x00000cc4
#define MCSIS BIT(31)
#define MEUIS BIT(1)
#define MECIS BIT(0)
#define MTL_ECC_INT_ENABLE 0x00000cc8
#define RPCEIE BIT(12)
#define ECEIE BIT(8)
#define RXCEIE BIT(4)
#define TXCEIE BIT(0)
#define MTL_ECC_INT_STATUS 0x00000ccc
#define MTL_DPP_CONTROL 0x00000ce0
#define EPSI BIT(2)
#define OPE BIT(1)
#define EDPP BIT(0)
#define DMA_SAFETY_INT_STATUS 0x00001080
#define MSUIS BIT(29)
#define MSCIS BIT(28)
#define DEUIS BIT(1)
#define DECIS BIT(0)
#define DMA_ECC_INT_ENABLE 0x00001084
#define TCEIE BIT(0)
#define DMA_ECC_INT_STATUS 0x00001088
int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp);
int dwmac5_safety_feat_irq_status(struct net_device *ndev,
void __iomem *ioaddr, unsigned int asp,
struct stmmac_safety_stats *stats);
int dwmac5_safety_feat_dump(struct stmmac_safety_stats *stats,
int index, unsigned long *count, const char **desc);
int dwmac5_rxp_config(void __iomem *ioaddr, struct stmmac_tc_entry *entries,
unsigned int count);
int dwmac5_flex_pps_config(void __iomem *ioaddr, int index,
struct stmmac_pps_cfg *cfg, bool enable,
u32 sub_second_inc, u32 systime_flags);
#endif /* __DWMAC5_H__ */