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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4daffb664a
The timeline->name is only used for convenience in pretty printing the i915_request.fence->ops->get_timeline_name() and it is just as convenient to pull it from the gem_context directly. The few instances of its use inside GEM_TRACE() has proven more of a nuisance than helpful, so not worth saving imo. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190321140711.11190-4-chris@chris-wilson.co.uk
128 lines
4.1 KiB
C
128 lines
4.1 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef I915_TIMELINE_H
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#define I915_TIMELINE_H
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#include <linux/lockdep.h>
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#include "i915_syncmap.h"
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#include "i915_timeline_types.h"
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int i915_timeline_init(struct drm_i915_private *i915,
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struct i915_timeline *tl,
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struct i915_vma *hwsp);
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void i915_timeline_fini(struct i915_timeline *tl);
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static inline void
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i915_timeline_set_subclass(struct i915_timeline *timeline,
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unsigned int subclass)
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{
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lockdep_set_subclass(&timeline->lock, subclass);
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/*
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* Due to an interesting quirk in lockdep's internal debug tracking,
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* after setting a subclass we must ensure the lock is used. Otherwise,
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* nr_unused_locks is incremented once too often.
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*/
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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local_irq_disable();
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lock_map_acquire(&timeline->lock.dep_map);
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lock_map_release(&timeline->lock.dep_map);
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local_irq_enable();
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#endif
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}
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struct i915_timeline *
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i915_timeline_create(struct drm_i915_private *i915,
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struct i915_vma *global_hwsp);
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static inline struct i915_timeline *
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i915_timeline_get(struct i915_timeline *timeline)
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{
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kref_get(&timeline->kref);
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return timeline;
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}
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void __i915_timeline_free(struct kref *kref);
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static inline void i915_timeline_put(struct i915_timeline *timeline)
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{
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kref_put(&timeline->kref, __i915_timeline_free);
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}
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static inline int __i915_timeline_sync_set(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_set(&tl->sync, context, seqno);
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}
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static inline int i915_timeline_sync_set(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_set(tl, fence->context, fence->seqno);
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}
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static inline bool __i915_timeline_sync_is_later(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_is_later(&tl->sync, context, seqno);
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}
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static inline bool i915_timeline_sync_is_later(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_is_later(tl, fence->context, fence->seqno);
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}
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int i915_timeline_pin(struct i915_timeline *tl);
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int i915_timeline_get_seqno(struct i915_timeline *tl,
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struct i915_request *rq,
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u32 *seqno);
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void i915_timeline_unpin(struct i915_timeline *tl);
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int i915_timeline_read_hwsp(struct i915_request *from,
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struct i915_request *until,
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u32 *hwsp_offset);
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void i915_timelines_init(struct drm_i915_private *i915);
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void i915_timelines_park(struct drm_i915_private *i915);
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void i915_timelines_fini(struct drm_i915_private *i915);
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/**
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* i915_timeline_set_barrier - orders submission between different timelines
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* @timeline: timeline to set the barrier on
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* @rq: request after which new submissions can proceed
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*
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* Sets the passed in request as the serialization point for all subsequent
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* submissions on @timeline. Subsequent requests will not be submitted to GPU
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* until the barrier has been completed.
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*/
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static inline int
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i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request *rq)
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{
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return i915_active_request_set(&tl->barrier, rq);
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}
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#endif
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