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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2152268ff9
Instead of using the shared area that we be killed. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
757 lines
21 KiB
C
757 lines
21 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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/*
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* DVM device-specific data & functions
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*/
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#include "iwl-core.h"
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#include "iwl-agn.h"
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#include "iwl-dev.h"
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#include "iwl-commands.h"
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#include "iwl-io.h"
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#include "iwl-prph.h"
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/*
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* 1000 series
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* ===========
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*/
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/*
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* For 1000, use advance thermal throttling critical temperature threshold,
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* but legacy thermal management implementation for now.
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* This is for the reason of 1000 uCode using advance thermal throttling API
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* but not implement ct_kill_exit based on ct_kill exit temperature
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* so the thermal throttling will still based on legacy thermal throttling
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* management.
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* The code here need to be modified once 1000 uCode has the advanced thermal
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* throttling algorithm in place
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*/
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static void iwl1000_set_ct_threshold(struct iwl_priv *priv)
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{
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/* want Celsius */
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priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
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priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
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}
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/* NIC configuration for 1000 series */
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static void iwl1000_nic_config(struct iwl_priv *priv)
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{
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/* set CSR_HW_CONFIG_REG for uCode use */
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iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
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CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
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/* Setting digital SVR for 1000 card to 1.32V */
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/* locking is acquired in iwl_set_bits_mask_prph() function */
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iwl_set_bits_mask_prph(priv->trans, APMG_DIGITAL_SVR_REG,
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APMG_SVR_DIGITAL_VOLTAGE_1_32,
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~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
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}
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/**
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* iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
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* @priv -- pointer to iwl_priv data structure
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* @tsf_bits -- number of bits need to shift for masking)
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*/
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static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
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u16 tsf_bits)
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{
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return (1 << tsf_bits) - 1;
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}
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/**
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* iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
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* @priv -- pointer to iwl_priv data structure
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* @tsf_bits -- number of bits need to shift for masking)
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*/
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static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
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u16 tsf_bits)
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{
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return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
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}
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/*
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* extended beacon time format
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* time in usec will be changed into a 32-bit value in extended:internal format
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* the extended part is the beacon counts
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* the internal part is the time in usec within one beacon interval
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*/
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static u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec,
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u32 beacon_interval)
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{
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u32 quot;
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u32 rem;
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u32 interval = beacon_interval * TIME_UNIT;
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if (!interval || !usec)
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return 0;
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quot = (usec / interval) &
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(iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) >>
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IWLAGN_EXT_BEACON_TIME_POS);
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rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
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IWLAGN_EXT_BEACON_TIME_POS);
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return (quot << IWLAGN_EXT_BEACON_TIME_POS) + rem;
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}
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/* base is usually what we get from ucode with each received frame,
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* the same as HW timer counter counting down
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*/
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static __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
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u32 addon, u32 beacon_interval)
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{
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u32 base_low = base & iwl_beacon_time_mask_low(priv,
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IWLAGN_EXT_BEACON_TIME_POS);
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u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
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IWLAGN_EXT_BEACON_TIME_POS);
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u32 interval = beacon_interval * TIME_UNIT;
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u32 res = (base & iwl_beacon_time_mask_high(priv,
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IWLAGN_EXT_BEACON_TIME_POS)) +
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(addon & iwl_beacon_time_mask_high(priv,
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IWLAGN_EXT_BEACON_TIME_POS));
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if (base_low > addon_low)
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res += base_low - addon_low;
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else if (base_low < addon_low) {
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res += interval + base_low - addon_low;
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res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
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} else
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res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
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return cpu_to_le32(res);
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}
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static const struct iwl_sensitivity_ranges iwl1000_sensitivity = {
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.min_nrg_cck = 95,
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.auto_corr_min_ofdm = 90,
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.auto_corr_min_ofdm_mrc = 170,
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.auto_corr_min_ofdm_x1 = 120,
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.auto_corr_min_ofdm_mrc_x1 = 240,
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.auto_corr_max_ofdm = 120,
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.auto_corr_max_ofdm_mrc = 210,
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.auto_corr_max_ofdm_x1 = 155,
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.auto_corr_max_ofdm_mrc_x1 = 290,
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.auto_corr_min_cck = 125,
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.auto_corr_max_cck = 200,
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.auto_corr_min_cck_mrc = 170,
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.auto_corr_max_cck_mrc = 400,
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.nrg_th_cck = 95,
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.nrg_th_ofdm = 95,
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.barker_corr_th_min = 190,
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.barker_corr_th_min_mrc = 390,
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.nrg_th_cca = 62,
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};
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static void iwl1000_hw_set_hw_params(struct iwl_priv *priv)
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{
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priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ);
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priv->hw_params.tx_chains_num =
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num_of_ant(priv->hw_params.valid_tx_ant);
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if (priv->cfg->rx_with_siso_diversity)
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priv->hw_params.rx_chains_num = 1;
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else
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priv->hw_params.rx_chains_num =
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num_of_ant(priv->hw_params.valid_rx_ant);
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iwl1000_set_ct_threshold(priv);
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/* Set initial sensitivity parameters */
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priv->hw_params.sens = &iwl1000_sensitivity;
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}
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struct iwl_lib_ops iwl1000_lib = {
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.set_hw_params = iwl1000_hw_set_hw_params,
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.nic_config = iwl1000_nic_config,
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.eeprom_ops = {
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.regulatory_bands = {
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EEPROM_REG_BAND_1_CHANNELS,
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EEPROM_REG_BAND_2_CHANNELS,
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EEPROM_REG_BAND_3_CHANNELS,
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EEPROM_REG_BAND_4_CHANNELS,
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EEPROM_REG_BAND_5_CHANNELS,
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EEPROM_REG_BAND_24_HT40_CHANNELS,
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EEPROM_REGULATORY_BAND_NO_HT40,
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},
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},
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.temperature = iwlagn_temperature,
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};
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/*
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* 2000 series
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* ===========
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*/
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static void iwl2000_set_ct_threshold(struct iwl_priv *priv)
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{
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/* want Celsius */
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priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
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priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
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}
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/* NIC configuration for 2000 series */
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static void iwl2000_nic_config(struct iwl_priv *priv)
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{
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iwl_rf_config(priv);
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iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
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}
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static const struct iwl_sensitivity_ranges iwl2000_sensitivity = {
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.min_nrg_cck = 97,
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.auto_corr_min_ofdm = 80,
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.auto_corr_min_ofdm_mrc = 128,
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.auto_corr_min_ofdm_x1 = 105,
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.auto_corr_min_ofdm_mrc_x1 = 192,
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.auto_corr_max_ofdm = 145,
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.auto_corr_max_ofdm_mrc = 232,
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.auto_corr_max_ofdm_x1 = 110,
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.auto_corr_max_ofdm_mrc_x1 = 232,
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.auto_corr_min_cck = 125,
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.auto_corr_max_cck = 175,
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.auto_corr_min_cck_mrc = 160,
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.auto_corr_max_cck_mrc = 310,
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.nrg_th_cck = 97,
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.nrg_th_ofdm = 100,
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.barker_corr_th_min = 190,
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.barker_corr_th_min_mrc = 390,
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.nrg_th_cca = 62,
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};
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static void iwl2000_hw_set_hw_params(struct iwl_priv *priv)
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{
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priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ);
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priv->hw_params.tx_chains_num =
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num_of_ant(priv->hw_params.valid_tx_ant);
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if (priv->cfg->rx_with_siso_diversity)
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priv->hw_params.rx_chains_num = 1;
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else
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priv->hw_params.rx_chains_num =
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num_of_ant(priv->hw_params.valid_rx_ant);
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iwl2000_set_ct_threshold(priv);
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/* Set initial sensitivity parameters */
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priv->hw_params.sens = &iwl2000_sensitivity;
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}
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struct iwl_lib_ops iwl2000_lib = {
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.set_hw_params = iwl2000_hw_set_hw_params,
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.nic_config = iwl2000_nic_config,
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.eeprom_ops = {
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.regulatory_bands = {
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EEPROM_REG_BAND_1_CHANNELS,
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EEPROM_REG_BAND_2_CHANNELS,
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EEPROM_REG_BAND_3_CHANNELS,
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EEPROM_REG_BAND_4_CHANNELS,
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EEPROM_REG_BAND_5_CHANNELS,
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EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
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EEPROM_REGULATORY_BAND_NO_HT40,
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},
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.enhanced_txpower = true,
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},
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.temperature = iwlagn_temperature,
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};
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struct iwl_lib_ops iwl2030_lib = {
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.set_hw_params = iwl2000_hw_set_hw_params,
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.nic_config = iwl2000_nic_config,
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.eeprom_ops = {
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.regulatory_bands = {
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EEPROM_REG_BAND_1_CHANNELS,
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EEPROM_REG_BAND_2_CHANNELS,
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EEPROM_REG_BAND_3_CHANNELS,
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EEPROM_REG_BAND_4_CHANNELS,
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EEPROM_REG_BAND_5_CHANNELS,
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EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
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EEPROM_REGULATORY_BAND_NO_HT40,
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},
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.enhanced_txpower = true,
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},
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.temperature = iwlagn_temperature,
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};
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/*
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* 5000 series
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* ===========
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*/
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/* NIC configuration for 5000 series */
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static void iwl5000_nic_config(struct iwl_priv *priv)
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{
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iwl_rf_config(priv);
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/* W/A : NIC is stuck in a reset state after Early PCIe power off
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* (PCIe power is lost before PERST# is asserted),
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* causing ME FW to lose ownership and not being able to obtain it back.
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*/
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iwl_set_bits_mask_prph(priv->trans, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
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~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
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}
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static const struct iwl_sensitivity_ranges iwl5000_sensitivity = {
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.min_nrg_cck = 100,
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.auto_corr_min_ofdm = 90,
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.auto_corr_min_ofdm_mrc = 170,
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.auto_corr_min_ofdm_x1 = 105,
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.auto_corr_min_ofdm_mrc_x1 = 220,
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.auto_corr_max_ofdm = 120,
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.auto_corr_max_ofdm_mrc = 210,
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.auto_corr_max_ofdm_x1 = 120,
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.auto_corr_max_ofdm_mrc_x1 = 240,
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.auto_corr_min_cck = 125,
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.auto_corr_max_cck = 200,
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.auto_corr_min_cck_mrc = 200,
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.auto_corr_max_cck_mrc = 400,
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.nrg_th_cck = 100,
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.nrg_th_ofdm = 100,
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.barker_corr_th_min = 190,
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.barker_corr_th_min_mrc = 390,
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.nrg_th_cca = 62,
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};
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static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
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.min_nrg_cck = 95,
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.auto_corr_min_ofdm = 90,
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.auto_corr_min_ofdm_mrc = 170,
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.auto_corr_min_ofdm_x1 = 105,
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.auto_corr_min_ofdm_mrc_x1 = 220,
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.auto_corr_max_ofdm = 120,
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.auto_corr_max_ofdm_mrc = 210,
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/* max = min for performance bug in 5150 DSP */
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.auto_corr_max_ofdm_x1 = 105,
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.auto_corr_max_ofdm_mrc_x1 = 220,
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.auto_corr_min_cck = 125,
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.auto_corr_max_cck = 200,
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.auto_corr_min_cck_mrc = 170,
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.auto_corr_max_cck_mrc = 400,
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.nrg_th_cck = 95,
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.nrg_th_ofdm = 95,
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.barker_corr_th_min = 190,
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.barker_corr_th_min_mrc = 390,
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.nrg_th_cca = 62,
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};
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#define IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF (-5)
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static s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
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{
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u16 temperature, voltage;
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__le16 *temp_calib = (__le16 *)iwl_eeprom_query_addr(priv,
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EEPROM_KELVIN_TEMPERATURE);
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temperature = le16_to_cpu(temp_calib[0]);
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voltage = le16_to_cpu(temp_calib[1]);
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/* offset = temp - volt / coeff */
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return (s32)(temperature -
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voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
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}
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static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
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{
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const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
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s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -
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iwl_temp_calib_to_offset(priv);
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priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef;
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}
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static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
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{
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/* want Celsius */
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priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
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}
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static void iwl5000_hw_set_hw_params(struct iwl_priv *priv)
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{
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priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
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BIT(IEEE80211_BAND_5GHZ);
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priv->hw_params.tx_chains_num =
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num_of_ant(priv->hw_params.valid_tx_ant);
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priv->hw_params.rx_chains_num =
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num_of_ant(priv->hw_params.valid_rx_ant);
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iwl5000_set_ct_threshold(priv);
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/* Set initial sensitivity parameters */
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priv->hw_params.sens = &iwl5000_sensitivity;
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}
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static void iwl5150_hw_set_hw_params(struct iwl_priv *priv)
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{
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priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
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BIT(IEEE80211_BAND_5GHZ);
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priv->hw_params.tx_chains_num =
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num_of_ant(priv->hw_params.valid_tx_ant);
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priv->hw_params.rx_chains_num =
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num_of_ant(priv->hw_params.valid_rx_ant);
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iwl5150_set_ct_threshold(priv);
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/* Set initial sensitivity parameters */
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priv->hw_params.sens = &iwl5150_sensitivity;
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}
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static void iwl5150_temperature(struct iwl_priv *priv)
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{
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u32 vt = 0;
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s32 offset = iwl_temp_calib_to_offset(priv);
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vt = le32_to_cpu(priv->statistics.common.temperature);
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vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;
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/* now vt hold the temperature in Kelvin */
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priv->temperature = KELVIN_TO_CELSIUS(vt);
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iwl_tt_handler(priv);
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}
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static int iwl5000_hw_channel_switch(struct iwl_priv *priv,
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struct ieee80211_channel_switch *ch_switch)
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{
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/*
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* MULTI-FIXME
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* See iwlagn_mac_channel_switch.
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*/
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struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
|
|
struct iwl5000_channel_switch_cmd cmd;
|
|
const struct iwl_channel_info *ch_info;
|
|
u32 switch_time_in_usec, ucode_switch_time;
|
|
u16 ch;
|
|
u32 tsf_low;
|
|
u8 switch_count;
|
|
u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
|
|
struct ieee80211_vif *vif = ctx->vif;
|
|
struct iwl_host_cmd hcmd = {
|
|
.id = REPLY_CHANNEL_SWITCH,
|
|
.len = { sizeof(cmd), },
|
|
.flags = CMD_SYNC,
|
|
.data = { &cmd, },
|
|
};
|
|
|
|
cmd.band = priv->band == IEEE80211_BAND_2GHZ;
|
|
ch = ch_switch->channel->hw_value;
|
|
IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
|
|
ctx->active.channel, ch);
|
|
cmd.channel = cpu_to_le16(ch);
|
|
cmd.rxon_flags = ctx->staging.flags;
|
|
cmd.rxon_filter_flags = ctx->staging.filter_flags;
|
|
switch_count = ch_switch->count;
|
|
tsf_low = ch_switch->timestamp & 0x0ffffffff;
|
|
/*
|
|
* calculate the ucode channel switch time
|
|
* adding TSF as one of the factor for when to switch
|
|
*/
|
|
if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
|
|
if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
|
|
beacon_interval)) {
|
|
switch_count -= (priv->ucode_beacon_time -
|
|
tsf_low) / beacon_interval;
|
|
} else
|
|
switch_count = 0;
|
|
}
|
|
if (switch_count <= 1)
|
|
cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
|
|
else {
|
|
switch_time_in_usec =
|
|
vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
|
|
ucode_switch_time = iwl_usecs_to_beacons(priv,
|
|
switch_time_in_usec,
|
|
beacon_interval);
|
|
cmd.switch_time = iwl_add_beacon_time(priv,
|
|
priv->ucode_beacon_time,
|
|
ucode_switch_time,
|
|
beacon_interval);
|
|
}
|
|
IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
|
|
cmd.switch_time);
|
|
ch_info = iwl_get_channel_info(priv, priv->band, ch);
|
|
if (ch_info)
|
|
cmd.expect_beacon = is_channel_radar(ch_info);
|
|
else {
|
|
IWL_ERR(priv, "invalid channel switch from %u to %u\n",
|
|
ctx->active.channel, ch);
|
|
return -EFAULT;
|
|
}
|
|
|
|
return iwl_dvm_send_cmd(priv, &hcmd);
|
|
}
|
|
|
|
struct iwl_lib_ops iwl5000_lib = {
|
|
.set_hw_params = iwl5000_hw_set_hw_params,
|
|
.set_channel_switch = iwl5000_hw_channel_switch,
|
|
.nic_config = iwl5000_nic_config,
|
|
.eeprom_ops = {
|
|
.regulatory_bands = {
|
|
EEPROM_REG_BAND_1_CHANNELS,
|
|
EEPROM_REG_BAND_2_CHANNELS,
|
|
EEPROM_REG_BAND_3_CHANNELS,
|
|
EEPROM_REG_BAND_4_CHANNELS,
|
|
EEPROM_REG_BAND_5_CHANNELS,
|
|
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
|
EEPROM_REG_BAND_52_HT40_CHANNELS
|
|
},
|
|
},
|
|
.temperature = iwlagn_temperature,
|
|
};
|
|
|
|
struct iwl_lib_ops iwl5150_lib = {
|
|
.set_hw_params = iwl5150_hw_set_hw_params,
|
|
.set_channel_switch = iwl5000_hw_channel_switch,
|
|
.nic_config = iwl5000_nic_config,
|
|
.eeprom_ops = {
|
|
.regulatory_bands = {
|
|
EEPROM_REG_BAND_1_CHANNELS,
|
|
EEPROM_REG_BAND_2_CHANNELS,
|
|
EEPROM_REG_BAND_3_CHANNELS,
|
|
EEPROM_REG_BAND_4_CHANNELS,
|
|
EEPROM_REG_BAND_5_CHANNELS,
|
|
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
|
EEPROM_REG_BAND_52_HT40_CHANNELS
|
|
},
|
|
},
|
|
.temperature = iwl5150_temperature,
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
* 6000 series
|
|
* ===========
|
|
*/
|
|
|
|
static void iwl6000_set_ct_threshold(struct iwl_priv *priv)
|
|
{
|
|
/* want Celsius */
|
|
priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
|
|
priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
|
|
}
|
|
|
|
/* NIC configuration for 6000 series */
|
|
static void iwl6000_nic_config(struct iwl_priv *priv)
|
|
{
|
|
iwl_rf_config(priv);
|
|
|
|
switch (priv->cfg->device_family) {
|
|
case IWL_DEVICE_FAMILY_6005:
|
|
case IWL_DEVICE_FAMILY_6030:
|
|
case IWL_DEVICE_FAMILY_6000:
|
|
break;
|
|
case IWL_DEVICE_FAMILY_6000i:
|
|
/* 2x2 IPA phy type */
|
|
iwl_write32(priv->trans, CSR_GP_DRIVER_REG,
|
|
CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
|
|
break;
|
|
case IWL_DEVICE_FAMILY_6050:
|
|
/* Indicate calibration version to uCode. */
|
|
if (iwl_eeprom_calib_version(priv) >= 6)
|
|
iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
|
|
CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
|
|
break;
|
|
case IWL_DEVICE_FAMILY_6150:
|
|
/* Indicate calibration version to uCode. */
|
|
if (iwl_eeprom_calib_version(priv) >= 6)
|
|
iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
|
|
CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
|
|
iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
|
|
CSR_GP_DRIVER_REG_BIT_6050_1x2);
|
|
break;
|
|
default:
|
|
WARN_ON(1);
|
|
}
|
|
}
|
|
|
|
static const struct iwl_sensitivity_ranges iwl6000_sensitivity = {
|
|
.min_nrg_cck = 110,
|
|
.auto_corr_min_ofdm = 80,
|
|
.auto_corr_min_ofdm_mrc = 128,
|
|
.auto_corr_min_ofdm_x1 = 105,
|
|
.auto_corr_min_ofdm_mrc_x1 = 192,
|
|
|
|
.auto_corr_max_ofdm = 145,
|
|
.auto_corr_max_ofdm_mrc = 232,
|
|
.auto_corr_max_ofdm_x1 = 110,
|
|
.auto_corr_max_ofdm_mrc_x1 = 232,
|
|
|
|
.auto_corr_min_cck = 125,
|
|
.auto_corr_max_cck = 175,
|
|
.auto_corr_min_cck_mrc = 160,
|
|
.auto_corr_max_cck_mrc = 310,
|
|
.nrg_th_cck = 110,
|
|
.nrg_th_ofdm = 110,
|
|
|
|
.barker_corr_th_min = 190,
|
|
.barker_corr_th_min_mrc = 336,
|
|
.nrg_th_cca = 62,
|
|
};
|
|
|
|
static void iwl6000_hw_set_hw_params(struct iwl_priv *priv)
|
|
{
|
|
priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
|
|
BIT(IEEE80211_BAND_5GHZ);
|
|
|
|
priv->hw_params.tx_chains_num =
|
|
num_of_ant(priv->hw_params.valid_tx_ant);
|
|
if (priv->cfg->rx_with_siso_diversity)
|
|
priv->hw_params.rx_chains_num = 1;
|
|
else
|
|
priv->hw_params.rx_chains_num =
|
|
num_of_ant(priv->hw_params.valid_rx_ant);
|
|
|
|
iwl6000_set_ct_threshold(priv);
|
|
|
|
/* Set initial sensitivity parameters */
|
|
priv->hw_params.sens = &iwl6000_sensitivity;
|
|
|
|
}
|
|
|
|
static int iwl6000_hw_channel_switch(struct iwl_priv *priv,
|
|
struct ieee80211_channel_switch *ch_switch)
|
|
{
|
|
/*
|
|
* MULTI-FIXME
|
|
* See iwlagn_mac_channel_switch.
|
|
*/
|
|
struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
|
|
struct iwl6000_channel_switch_cmd cmd;
|
|
const struct iwl_channel_info *ch_info;
|
|
u32 switch_time_in_usec, ucode_switch_time;
|
|
u16 ch;
|
|
u32 tsf_low;
|
|
u8 switch_count;
|
|
u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
|
|
struct ieee80211_vif *vif = ctx->vif;
|
|
struct iwl_host_cmd hcmd = {
|
|
.id = REPLY_CHANNEL_SWITCH,
|
|
.len = { sizeof(cmd), },
|
|
.flags = CMD_SYNC,
|
|
.data = { &cmd, },
|
|
};
|
|
|
|
cmd.band = priv->band == IEEE80211_BAND_2GHZ;
|
|
ch = ch_switch->channel->hw_value;
|
|
IWL_DEBUG_11H(priv, "channel switch from %u to %u\n",
|
|
ctx->active.channel, ch);
|
|
cmd.channel = cpu_to_le16(ch);
|
|
cmd.rxon_flags = ctx->staging.flags;
|
|
cmd.rxon_filter_flags = ctx->staging.filter_flags;
|
|
switch_count = ch_switch->count;
|
|
tsf_low = ch_switch->timestamp & 0x0ffffffff;
|
|
/*
|
|
* calculate the ucode channel switch time
|
|
* adding TSF as one of the factor for when to switch
|
|
*/
|
|
if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
|
|
if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
|
|
beacon_interval)) {
|
|
switch_count -= (priv->ucode_beacon_time -
|
|
tsf_low) / beacon_interval;
|
|
} else
|
|
switch_count = 0;
|
|
}
|
|
if (switch_count <= 1)
|
|
cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
|
|
else {
|
|
switch_time_in_usec =
|
|
vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
|
|
ucode_switch_time = iwl_usecs_to_beacons(priv,
|
|
switch_time_in_usec,
|
|
beacon_interval);
|
|
cmd.switch_time = iwl_add_beacon_time(priv,
|
|
priv->ucode_beacon_time,
|
|
ucode_switch_time,
|
|
beacon_interval);
|
|
}
|
|
IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
|
|
cmd.switch_time);
|
|
ch_info = iwl_get_channel_info(priv, priv->band, ch);
|
|
if (ch_info)
|
|
cmd.expect_beacon = is_channel_radar(ch_info);
|
|
else {
|
|
IWL_ERR(priv, "invalid channel switch from %u to %u\n",
|
|
ctx->active.channel, ch);
|
|
return -EFAULT;
|
|
}
|
|
|
|
return iwl_dvm_send_cmd(priv, &hcmd);
|
|
}
|
|
|
|
struct iwl_lib_ops iwl6000_lib = {
|
|
.set_hw_params = iwl6000_hw_set_hw_params,
|
|
.set_channel_switch = iwl6000_hw_channel_switch,
|
|
.nic_config = iwl6000_nic_config,
|
|
.eeprom_ops = {
|
|
.regulatory_bands = {
|
|
EEPROM_REG_BAND_1_CHANNELS,
|
|
EEPROM_REG_BAND_2_CHANNELS,
|
|
EEPROM_REG_BAND_3_CHANNELS,
|
|
EEPROM_REG_BAND_4_CHANNELS,
|
|
EEPROM_REG_BAND_5_CHANNELS,
|
|
EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
|
|
EEPROM_REG_BAND_52_HT40_CHANNELS
|
|
},
|
|
.enhanced_txpower = true,
|
|
},
|
|
.temperature = iwlagn_temperature,
|
|
};
|
|
|
|
struct iwl_lib_ops iwl6030_lib = {
|
|
.set_hw_params = iwl6000_hw_set_hw_params,
|
|
.set_channel_switch = iwl6000_hw_channel_switch,
|
|
.nic_config = iwl6000_nic_config,
|
|
.eeprom_ops = {
|
|
.regulatory_bands = {
|
|
EEPROM_REG_BAND_1_CHANNELS,
|
|
EEPROM_REG_BAND_2_CHANNELS,
|
|
EEPROM_REG_BAND_3_CHANNELS,
|
|
EEPROM_REG_BAND_4_CHANNELS,
|
|
EEPROM_REG_BAND_5_CHANNELS,
|
|
EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
|
|
EEPROM_REG_BAND_52_HT40_CHANNELS
|
|
},
|
|
.enhanced_txpower = true,
|
|
},
|
|
.temperature = iwlagn_temperature,
|
|
};
|