mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 09:02:57 +07:00
be00300147
The ARM PMU and ARM architected timer nodes are part of ARM CPU design
therefore they should not be inside the soc node. This also fixes DTC
W=1 warnings like:
arch/arm/boot/dts/exynos3250.dtsi:106.21-135.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
arch/arm/boot/dts/exynos3250.dtsi:676.7-680.5:
Warning (simple_bus_reg): /soc/pmu: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
212 lines
4.9 KiB
Plaintext
212 lines
4.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung's Exynos54xx SoC series common device tree source
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*
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* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* Copyright (c) 2016 Krzysztof Kozlowski
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*
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* Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific
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* Exynos 54xx SoCs should include this file and customize it further
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* (e.g. with clocks).
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*/
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#include "exynos5.dtsi"
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/ {
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compatible = "samsung,exynos5";
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aliases {
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i2c4 = &hsi2c_4;
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i2c5 = &hsi2c_5;
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i2c6 = &hsi2c_6;
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i2c7 = &hsi2c_7;
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usbdrdphy0 = &usbdrd_phy0;
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usbdrdphy1 = &usbdrd_phy1;
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};
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arm_a7_pmu: arm-a7-pmu {
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compatible = "arm,cortex-a7-pmu";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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arm_a15_pmu: arm-a15-pmu {
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compatible = "arm,cortex-a15-pmu";
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interrupt-parent = <&combiner>;
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interrupts = <1 2>,
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<7 0>,
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<16 6>,
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<19 2>;
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status = "disabled";
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};
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soc: soc {
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sysram@2020000 {
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compatible = "mmio-sram";
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reg = <0x02020000 0x54000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x02020000 0x54000>;
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smp-sysram@0 {
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compatible = "samsung,exynos4210-sysram";
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reg = <0x0 0x1000>;
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};
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smp-sysram@53000 {
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compatible = "samsung,exynos4210-sysram-ns";
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reg = <0x53000 0x1000>;
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};
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};
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mct: mct@101c0000 {
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compatible = "samsung,exynos4210-mct";
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reg = <0x101c0000 0xb00>;
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
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<8>, <9>, <10>, <11>;
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mct_map: mct-map {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &combiner 23 3>,
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<1 &combiner 23 4>,
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<2 &combiner 25 2>,
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<3 &combiner 25 3>,
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<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
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<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
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<6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
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<7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
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<8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
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<9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
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<10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
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<11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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watchdog: watchdog@101d0000 {
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compatible = "samsung,exynos5420-wdt";
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reg = <0x101d0000 0x100>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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};
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/* i2c_0-3 are defined in exynos5.dtsi */
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hsi2c_4: i2c@12ca0000 {
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compatible = "samsung,exynos5250-hsi2c";
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reg = <0x12ca0000 0x1000>;
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interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_5: i2c@12cb0000 {
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compatible = "samsung,exynos5250-hsi2c";
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reg = <0x12cb0000 0x1000>;
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_6: i2c@12cc0000 {
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compatible = "samsung,exynos5250-hsi2c";
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reg = <0x12cc0000 0x1000>;
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_7: i2c@12cd0000 {
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compatible = "samsung,exynos5250-hsi2c";
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reg = <0x12cd0000 0x1000>;
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interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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usbdrd3_0: usb3-0 {
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compatible = "samsung,exynos5250-dwusb3";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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usbdrd_dwc3_0: dwc3@12000000 {
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compatible = "snps,dwc3";
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reg = <0x12000000 0x10000>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
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phy-names = "usb2-phy", "usb3-phy";
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snps,dis_u3_susphy_quirk;
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};
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};
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usbdrd_phy0: phy@12100000 {
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compatible = "samsung,exynos5420-usbdrd-phy";
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reg = <0x12100000 0x100>;
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#phy-cells = <1>;
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};
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usbdrd3_1: usb3-1 {
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compatible = "samsung,exynos5250-dwusb3";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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usbdrd_dwc3_1: dwc3@12400000 {
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compatible = "snps,dwc3";
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reg = <0x12400000 0x10000>;
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phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
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phy-names = "usb2-phy", "usb3-phy";
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snps,dis_u3_susphy_quirk;
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};
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};
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usbdrd_phy1: phy@12500000 {
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compatible = "samsung,exynos5420-usbdrd-phy";
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reg = <0x12500000 0x100>;
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#phy-cells = <1>;
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};
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usbhost2: usb@12110000 {
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compatible = "samsung,exynos4210-ehci";
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reg = <0x12110000 0x100>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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phys = <&usb2_phy 1>;
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};
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};
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usbhost1: usb@12120000 {
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compatible = "samsung,exynos4210-ohci";
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reg = <0x12120000 0x100>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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phys = <&usb2_phy 1>;
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};
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};
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usb2_phy: phy@12130000 {
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compatible = "samsung,exynos5250-usb2-phy";
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reg = <0x12130000 0x100>;
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#phy-cells = <1>;
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};
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};
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};
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