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The latest Marvell bootloaders for various boards change the MBus Window base address from 0xC0000000 to 0xF0000000, in order to make more RAM in the first 4 GB actually usable by the kernel (RAM that is covered by the MBus window is "shadowed" and therefore not usable). However, our default PCIe memory and I/O apertures where sitting at 0xe0000000 (for memory) and 0xe8000000 (for I/O), which will now be outside of the MBus Window range on those platforms. To make things work, we have to ensure those apertures use addresses in the 0xF0000000 -> 0xFFFFFFFF range. Of course this change of the MBus Window base address from 0xC0000000 to 0xF0000000 also comes with a change of the internal register base address from 0xD0000000 to 0xF1000000. We have therefore designed the following memory map: * 0xF0000000 -> 0xF1000000: 16 MB, used for NOR flashes on Armada XP GP and Armada XP DB. * 0xF1000000 -> 0xF1100000: 1 MB, used for internal registers. * 0xF8000000 -> 0xFFE00000: 126 MB, used for PCIe memory. * 0xFFE00000 -> 0xFFF00000: 1 MB, used for PCIe I/O. * 0xFFF00000 -> 0xFFFFFFFF: 1 MB, used for the BootROM mapping There is one exception to this layout: the Armada XP OpenBlocks, which has a 128 MB NOR flash, mapped from 0xF0000000 to 0xF8000000. This does not conflict with the current change for the PCIe I/O and memory apertures, and continues to work because on Armada XP OpenBlocks, the bootloader is an old one, and continues to have internal registers mapped at 0xD0000000. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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