Chris Wilson 46a0b638f3 Revert "drm/i915: Workaround incoherence between fences and LLC across multiple CPUs" ... This reverts commit 25ff119 and the follow on for Valleyview commit 2dc8aae. commit 25ff1195f8 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Apr 4 21:31:03 2013 +0100 drm/i915: Workaround incoherence between fences and LLC across multiple CPUs commit 2dc8aae06d Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed May 22 17:08:06 2013 +0100 drm/i915: Workaround incoherence with fence updates on Valleyview Jon Bloomfield came up with a plausible explanation and cheap fix (drm/i915: Fix incoherence with fence updates on Sandybridge+) for the race condition, so lets run with it. This is a candidate for stable as the old workaround incurs a significant cost (calling wbinvd on all CPUs before performing the register write) for some workloads as noted by Carsten Emde. Link: http://lists.freedesktop.org/archives/intel-gfx/2013-June/028819.html References: https://www.osadl.org/?id=1543#c7602 References: https://bugs.freedesktop.org/show_bug.cgi?id=63825 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jon Bloomfield <jon.bloomfield@intel.com> Cc: Carsten Emde <C.Emde@osadl.org> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2013-07-10 15:31:12 +02:00
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drm	Revert "drm/i915: Workaround incoherence between fences and LLC across multiple CPUs"	2013-07-10 15:31:12 +02:00
host1x	gpu: host1x: Rework CPU syncpoint increment	2013-06-22 12:43:55 +02:00
vga	fbcon: fix locking harder	2013-02-08 12:02:43 +10:00
Makefile	gpu: host1x: Add host1x driver	2013-04-22 12:32:40 +02:00