mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 21:50:53 +07:00
4659c53483
This adds the necessary init functions to init the clocks from the common clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy clock code. This also includes empty stubs for the *_setup_clocks functions that are called from the cpufreq driver on resume. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
137 lines
4.1 KiB
C
137 lines
4.1 KiB
C
/*
|
|
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
*
|
|
* Common Header for S3C24XX SoCs
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
|
|
#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
|
|
|
|
#include <linux/reboot.h>
|
|
|
|
struct s3c2410_uartcfg;
|
|
|
|
#ifdef CONFIG_CPU_S3C2410
|
|
extern int s3c2410_init(void);
|
|
extern int s3c2410a_init(void);
|
|
extern void s3c2410_map_io(void);
|
|
extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
|
extern void s3c2410_init_clocks(int xtal);
|
|
extern void s3c2410_restart(enum reboot_mode mode, const char *cmd);
|
|
extern void s3c2410_init_irq(void);
|
|
#else
|
|
#define s3c2410_init_clocks NULL
|
|
#define s3c2410_init_uarts NULL
|
|
#define s3c2410_map_io NULL
|
|
#define s3c2410_init NULL
|
|
#define s3c2410a_init NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2412
|
|
extern int s3c2412_init(void);
|
|
extern void s3c2412_map_io(void);
|
|
extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
|
extern void s3c2412_init_clocks(int xtal);
|
|
extern int s3c2412_baseclk_add(void);
|
|
extern void s3c2412_restart(enum reboot_mode mode, const char *cmd);
|
|
extern void s3c2412_init_irq(void);
|
|
#else
|
|
#define s3c2412_init_clocks NULL
|
|
#define s3c2412_init_uarts NULL
|
|
#define s3c2412_map_io NULL
|
|
#define s3c2412_init NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2416
|
|
extern int s3c2416_init(void);
|
|
extern void s3c2416_map_io(void);
|
|
extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
|
extern void s3c2416_init_clocks(int xtal);
|
|
extern int s3c2416_baseclk_add(void);
|
|
extern void s3c2416_restart(enum reboot_mode mode, const char *cmd);
|
|
extern void s3c2416_init_irq(void);
|
|
|
|
extern struct syscore_ops s3c2416_irq_syscore_ops;
|
|
#else
|
|
#define s3c2416_init_clocks NULL
|
|
#define s3c2416_init_uarts NULL
|
|
#define s3c2416_map_io NULL
|
|
#define s3c2416_init NULL
|
|
#endif
|
|
|
|
#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
|
|
extern void s3c244x_map_io(void);
|
|
extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
|
extern void s3c244x_init_clocks(int xtal);
|
|
extern void s3c244x_restart(enum reboot_mode mode, const char *cmd);
|
|
#else
|
|
#define s3c244x_init_clocks NULL
|
|
#define s3c244x_init_uarts NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2440
|
|
extern int s3c2440_init(void);
|
|
extern void s3c2440_map_io(void);
|
|
extern void s3c2440_init_clocks(int xtal);
|
|
extern void s3c2440_init_irq(void);
|
|
#else
|
|
#define s3c2440_init NULL
|
|
#define s3c2440_map_io NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2442
|
|
extern int s3c2442_init(void);
|
|
extern void s3c2442_map_io(void);
|
|
extern void s3c2442_init_clocks(int xtal);
|
|
extern void s3c2442_init_irq(void);
|
|
#else
|
|
#define s3c2442_init NULL
|
|
#define s3c2442_map_io NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2443
|
|
extern int s3c2443_init(void);
|
|
extern void s3c2443_map_io(void);
|
|
extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
|
extern void s3c2443_init_clocks(int xtal);
|
|
extern int s3c2443_baseclk_add(void);
|
|
extern void s3c2443_restart(enum reboot_mode mode, const char *cmd);
|
|
extern void s3c2443_init_irq(void);
|
|
#else
|
|
#define s3c2443_init_clocks NULL
|
|
#define s3c2443_init_uarts NULL
|
|
#define s3c2443_map_io NULL
|
|
#define s3c2443_init NULL
|
|
#endif
|
|
|
|
extern struct syscore_ops s3c24xx_irq_syscore_ops;
|
|
|
|
extern struct platform_device s3c2410_device_dma;
|
|
extern struct platform_device s3c2412_device_dma;
|
|
extern struct platform_device s3c2440_device_dma;
|
|
extern struct platform_device s3c2443_device_dma;
|
|
|
|
extern struct platform_device s3c2410_device_dclk;
|
|
|
|
#ifdef CONFIG_S3C2410_COMMON_CLK
|
|
void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f,
|
|
int current_soc,
|
|
void __iomem *reg_base);
|
|
#endif
|
|
#ifdef CONFIG_S3C2412_COMMON_CLK
|
|
void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f,
|
|
unsigned long ext_f, void __iomem *reg_base);
|
|
#endif
|
|
#ifdef CONFIG_S3C2443_COMMON_CLK
|
|
void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f,
|
|
int current_soc,
|
|
void __iomem *reg_base);
|
|
#endif
|
|
|
|
#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
|