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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f911e7234f
lockdep insists that if we give a lock a subclass, it must be used. Failure to do so triggers a self-consistency check when reading lockdep_stats: [ 49.902002] DEBUG_LOCKS_WARN_ON(debug_atomic_read(nr_unused_locks) != nr_unused) [ 49.902009] WARNING: CPU: 3 PID: 383 at kernel/locking/lockdep_proc.c:249 lockdep_stats_show+0x984/0xa10 [ 49.902026] Modules linked in: nls_ascii nls_cp437 vfat fat crct10dif_pclmul crc32_pclmul crc32c_intel aesni_intel aes_x86_64 crypto_simd cryptd glue_helper intel_cstate intel_uncore intel_rapl_perf intel_gtt efivars prime_numbers ahci libahci i2c_i801 video button efivarfs [last unloaded: drm_kms_helper] [ 49.902059] CPU: 3 PID: 383 Comm: cat Tainted: G U 4.20.0-rc2+ #304 [ 49.902068] Hardware name: Intel Corporation NUC7i5BNK/NUC7i5BNB, BIOS BNKBL357.86A.0052.2017.0918.1346 09/18/2017 [ 49.902079] RIP: 0010:lockdep_stats_show+0x984/0xa10 [ 49.902086] Code: 00 85 c0 0f 84 aa f8 ff ff 8b 05 77 37 e2 00 85 c0 0f 85 9c f8 ff ff 48 c7 c6 e0 57 bc 81 48 c7 c7 28 30 bb 81 e8 6b 77 fa ff <0f> 0b e9 82 f8 ff ff 48 c7 44 24 50 00 00 00 00 45 31 e4 31 db 31 [ 49.902103] RSP: 0018:ffffc90000247d58 EFLAGS: 00010292 [ 49.902110] RAX: 0000000000000044 RBX: 00000000000002f0 RCX: 0000000000000000 [ 49.902118] RDX: 0000000000000002 RSI: 0000000000000001 RDI: ffffffff810b3464 [ 49.902126] RBP: 0000000000000039 R08: 0000000000000002 R09: 0000000000000000 [ 49.902133] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000007ead [ 49.902141] R13: 0000000000000001 R14: ffff88884c021000 R15: 0000000000000097 [ 49.902150] FS: 00007fb347e66540(0000) GS:ffff88885e600000(0000) knlGS:0000000000000000 [ 49.902159] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 49.902165] CR2: 00007fb347aeb000 CR3: 00000008544bd005 CR4: 00000000001606e0 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181115203851.25739-1-chris@chris-wilson.co.uk
148 lines
4.6 KiB
C
148 lines
4.6 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef I915_TIMELINE_H
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#define I915_TIMELINE_H
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#include <linux/list.h>
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#include <linux/kref.h>
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#include "i915_request.h"
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#include "i915_syncmap.h"
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#include "i915_utils.h"
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struct i915_timeline {
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u64 fence_context;
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u32 seqno;
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spinlock_t lock;
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#define TIMELINE_CLIENT 0 /* default subclass */
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#define TIMELINE_ENGINE 1
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/**
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* List of breadcrumbs associated with GPU requests currently
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* outstanding.
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*/
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struct list_head requests;
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/* Contains an RCU guarded pointer to the last request. No reference is
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* held to the request, users must carefully acquire a reference to
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* the request using i915_gem_active_get_request_rcu(), or hold the
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* struct_mutex.
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*/
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struct i915_gem_active last_request;
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/**
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* We track the most recent seqno that we wait on in every context so
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* that we only have to emit a new await and dependency on a more
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* recent sync point. As the contexts may be executed out-of-order, we
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* have to track each individually and can not rely on an absolute
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* global_seqno. When we know that all tracked fences are completed
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* (i.e. when the driver is idle), we know that the syncmap is
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* redundant and we can discard it without loss of generality.
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*/
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struct i915_syncmap *sync;
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/**
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* Separately to the inter-context seqno map above, we track the last
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* barrier (e.g. semaphore wait) to the global engine timelines. Note
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* that this tracks global_seqno rather than the context.seqno, and
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* so it is subject to the limitations of hw wraparound and that we
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* may need to revoke global_seqno (on pre-emption).
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*/
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u32 global_sync[I915_NUM_ENGINES];
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struct list_head link;
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const char *name;
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struct kref kref;
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};
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void i915_timeline_init(struct drm_i915_private *i915,
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struct i915_timeline *tl,
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const char *name);
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void i915_timeline_fini(struct i915_timeline *tl);
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static inline void
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i915_timeline_set_subclass(struct i915_timeline *timeline,
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unsigned int subclass)
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{
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lockdep_set_subclass(&timeline->lock, subclass);
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/*
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* Due to an interesting quirk in lockdep's internal debug tracking,
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* after setting a subclass we must ensure the lock is used. Otherwise,
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* nr_unused_locks is incremented once too often.
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*/
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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local_irq_disable();
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lock_map_acquire(&timeline->lock.dep_map);
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lock_map_release(&timeline->lock.dep_map);
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local_irq_enable();
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#endif
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}
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struct i915_timeline *
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i915_timeline_create(struct drm_i915_private *i915, const char *name);
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static inline struct i915_timeline *
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i915_timeline_get(struct i915_timeline *timeline)
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{
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kref_get(&timeline->kref);
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return timeline;
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}
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void __i915_timeline_free(struct kref *kref);
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static inline void i915_timeline_put(struct i915_timeline *timeline)
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{
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kref_put(&timeline->kref, __i915_timeline_free);
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}
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static inline int __i915_timeline_sync_set(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_set(&tl->sync, context, seqno);
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}
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static inline int i915_timeline_sync_set(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_set(tl, fence->context, fence->seqno);
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}
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static inline bool __i915_timeline_sync_is_later(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_is_later(&tl->sync, context, seqno);
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}
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static inline bool i915_timeline_sync_is_later(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_is_later(tl, fence->context, fence->seqno);
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}
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void i915_timelines_park(struct drm_i915_private *i915);
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#endif
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