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6ebbf2ce43
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
38 lines
942 B
ArmAsm
38 lines
942 B
ArmAsm
/* Bootloader to resume MIO A701
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*
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* 2007-1-12 Robert Jarzmik
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*
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* This code is licenced under the GPLv2.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* Note: Yes, part of the following code is located into the .data section.
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* This is to allow jumpaddr to be accessed with a relative load
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* while we can't rely on any MMU translation. We could have put
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* sleep_save_sp in the .text section as well, but some setups might
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* insist on it to be truly read-only.
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*/
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.data
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ENTRY(mioa701_bootstrap)
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0:
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b 1f
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ENTRY(mioa701_jumpaddr)
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.word 0x40f00008 @ PSPR in no-MMU mode
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1:
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mov r0, #0xa0000000 @ Don't suppose memory access works
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orr r0, r0, #0x00200000 @ even if it's supposed to
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orr r0, r0, #0x0000b000
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mov r1, #0
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str r1, [r0] @ Early disable resume for next boot
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ldr r0, mioa701_jumpaddr @ (Murphy's Law)
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ldr r0, [r0]
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ret r0
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2:
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ENTRY(mioa701_bootstrap_lg)
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.data
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.word 2b-0b
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