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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c3373b09ba
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
383 lines
6.4 KiB
Plaintext
383 lines
6.4 KiB
Plaintext
/*
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* Device Tree Source for the SILK board
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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* Copyright (C) 2014-2015 Renesas Solutions Corp.
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* Copyright (C) 2014-2015 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a7794.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "SILK";
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compatible = "renesas,silk", "renesas,r8a7794";
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aliases {
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serial0 = &scif2;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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d3_3v: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "D3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi1: regulator@3 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI1 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi1: regulator@4 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI1 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vga-encoder {
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compatible = "adi,adv7123";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7123_in: endpoint {
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remote-endpoint = <&du_out_rgb1>;
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};
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};
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port@1 {
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reg = <1>;
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adv7123_out: endpoint {
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remote-endpoint = <&vga_in>;
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};
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};
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};
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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vga {
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compatible = "vga-connector";
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port {
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vga_in: endpoint {
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remote-endpoint = <&adv7123_out>;
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};
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};
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};
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x2_clk: x2-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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x3_clk: x3-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <74250000>;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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scif2_pins: serial2 {
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renesas,groups = "scif2_data";
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renesas,function = "scif2";
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};
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scif_clk_pins: scif_clk {
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renesas,groups = "scif_clk";
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renesas,function = "scif_clk";
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};
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ether_pins: ether {
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renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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renesas,function = "eth";
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};
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phy1_pins: phy1 {
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renesas,groups = "intc_irq8";
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renesas,function = "intc";
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};
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i2c1_pins: i2c1 {
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renesas,groups = "i2c1";
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renesas,function = "i2c1";
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};
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mmcif0_pins: mmcif0 {
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renesas,groups = "mmc_data8", "mmc_ctrl";
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renesas,function = "mmc";
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};
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sdhi1_pins: sd1 {
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renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
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renesas,function = "sdhi1";
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};
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qspi_pins: spi0 {
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renesas,groups = "qspi_ctrl", "qspi_data4";
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renesas,function = "qspi";
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};
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vin0_pins: vin0 {
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renesas,groups = "vin0_data8", "vin0_clk";
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renesas,function = "vin0";
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};
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usb0_pins: usb0 {
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renesas,groups = "usb0";
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renesas,function = "usb0";
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};
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usb1_pins: usb1 {
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renesas,groups = "usb1";
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renesas,function = "usb1";
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};
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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status = "okay";
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};
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ðer {
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pinctrl-0 = <ðer_pins &phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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remote = <&vin0>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin0ep>;
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};
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};
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};
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hdmi@39 {
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compatible = "adi,adv7511w";
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reg = <0x39>;
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interrupt-parent = <&gpio5>;
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interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,input-style = <1>;
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adi,input-justification = "evenly";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511_in: endpoint {
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remote-endpoint = <&du_out_rgb0>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_con>;
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};
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};
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};
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};
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};
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&mmcif0 {
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pinctrl-0 = <&mmcif0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&d3_3v>;
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vqmmc-supply = <&d3_3v>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&sdhi1 {
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pinctrl-0 = <&sdhi1_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi1>;
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vqmmc-supply = <&vccq_sdhi1>;
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cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "spansion,s25fl512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-cpol;
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spi-cpha;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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partition@40000 {
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label = "user";
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reg = <0x00040000 0x00400000>;
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read-only;
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};
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partition@440000 {
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label = "flash";
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reg = <0x00440000 0x03bc0000>;
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};
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};
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};
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};
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/* composite video input */
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&vin0 {
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status = "okay";
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pinctrl-0 = <&vin0_pins>;
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pinctrl-names = "default";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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vin0ep: endpoint {
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remote-endpoint = <&adv7180>;
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bus-width = <8>;
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};
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};
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};
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&pci0 {
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status = "okay";
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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};
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&pci1 {
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status = "okay";
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pinctrl-0 = <&usb1_pins>;
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pinctrl-names = "default";
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};
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&usbphy {
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status = "okay";
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};
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&du {
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status = "okay";
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clocks = <&mstp7_clks R8A7794_CLK_DU0>,
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<&mstp7_clks R8A7794_CLK_DU0>,
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<&x2_clk>, <&x3_clk>;
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clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
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ports {
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port@0 {
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endpoint {
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remote-endpoint = <&adv7511_in>;
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};
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};
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port@1 {
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endpoint {
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remote-endpoint = <&adv7123_in>;
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};
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};
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};
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};
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