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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c3f52220f2
Since Tegra186 the Host1x hardware allows syncpoints to be assigned to specific channels, preventing any other channels from incrementing them. Enable this feature where available and assign syncpoints to channels when submitting a job. Syncpoints are currently never unassigned from channels since that would require extra work and is unnecessary with the current channel allocation model. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
163 lines
4.0 KiB
C
163 lines
4.0 KiB
C
/*
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* Tegra host1x Syncpoints
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*
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* Copyright (c) 2010-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/io.h>
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#include "../dev.h"
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#include "../syncpt.h"
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/*
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* Write the current syncpoint value back to hw.
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*/
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static void syncpt_restore(struct host1x_syncpt *sp)
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{
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u32 min = host1x_syncpt_read_min(sp);
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struct host1x *host = sp->host;
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host1x_sync_writel(host, min, HOST1X_SYNC_SYNCPT(sp->id));
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}
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/*
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* Write the current waitbase value back to hw.
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*/
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static void syncpt_restore_wait_base(struct host1x_syncpt *sp)
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{
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struct host1x *host = sp->host;
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host1x_sync_writel(host, sp->base_val,
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HOST1X_SYNC_SYNCPT_BASE(sp->id));
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}
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/*
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* Read waitbase value from hw.
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*/
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static void syncpt_read_wait_base(struct host1x_syncpt *sp)
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{
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struct host1x *host = sp->host;
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sp->base_val =
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host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(sp->id));
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}
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/*
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* Updates the last value read from hardware.
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*/
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static u32 syncpt_load(struct host1x_syncpt *sp)
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{
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struct host1x *host = sp->host;
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u32 old, live;
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/* Loop in case there's a race writing to min_val */
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do {
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old = host1x_syncpt_read_min(sp);
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live = host1x_sync_readl(host, HOST1X_SYNC_SYNCPT(sp->id));
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} while ((u32)atomic_cmpxchg(&sp->min_val, old, live) != old);
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if (!host1x_syncpt_check_max(sp, live))
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dev_err(host->dev, "%s failed: id=%u, min=%d, max=%d\n",
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__func__, sp->id, host1x_syncpt_read_min(sp),
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host1x_syncpt_read_max(sp));
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return live;
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}
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/*
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* Write a cpu syncpoint increment to the hardware, without touching
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* the cache.
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*/
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static int syncpt_cpu_incr(struct host1x_syncpt *sp)
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{
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struct host1x *host = sp->host;
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u32 reg_offset = sp->id / 32;
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if (!host1x_syncpt_client_managed(sp) &&
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host1x_syncpt_idle(sp))
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return -EINVAL;
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host1x_sync_writel(host, BIT(sp->id % 32),
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HOST1X_SYNC_SYNCPT_CPU_INCR(reg_offset));
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wmb();
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return 0;
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}
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/* remove a wait pointed to by patch_addr */
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static int syncpt_patch_wait(struct host1x_syncpt *sp, void *patch_addr)
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{
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u32 override = host1x_class_host_wait_syncpt(HOST1X_SYNCPT_RESERVED, 0);
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*((u32 *)patch_addr) = override;
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return 0;
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}
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/**
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* syncpt_assign_to_channel() - Assign syncpoint to channel
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* @sp: syncpoint
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* @ch: channel
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*
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* On chips with the syncpoint protection feature (Tegra186+), assign @sp to
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* @ch, preventing other channels from incrementing the syncpoints. If @ch is
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* NULL, unassigns the syncpoint.
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*
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* On older chips, do nothing.
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*/
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static void syncpt_assign_to_channel(struct host1x_syncpt *sp,
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struct host1x_channel *ch)
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{
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#if HOST1X_HW >= 6
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struct host1x *host = sp->host;
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if (!host->hv_regs)
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return;
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host1x_sync_writel(host,
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HOST1X_SYNC_SYNCPT_CH_APP_CH(ch ? ch->id : 0xff),
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HOST1X_SYNC_SYNCPT_CH_APP(sp->id));
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#endif
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}
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/**
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* syncpt_enable_protection() - Enable syncpoint protection
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* @host: host1x instance
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*
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* On chips with the syncpoint protection feature (Tegra186+), enable this
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* feature. On older chips, do nothing.
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*/
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static void syncpt_enable_protection(struct host1x *host)
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{
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#if HOST1X_HW >= 6
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if (!host->hv_regs)
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return;
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host1x_hypervisor_writel(host, HOST1X_HV_SYNCPT_PROT_EN_CH_EN,
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HOST1X_HV_SYNCPT_PROT_EN);
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#endif
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}
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static const struct host1x_syncpt_ops host1x_syncpt_ops = {
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.restore = syncpt_restore,
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.restore_wait_base = syncpt_restore_wait_base,
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.load_wait_base = syncpt_read_wait_base,
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.load = syncpt_load,
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.cpu_incr = syncpt_cpu_incr,
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.patch_wait = syncpt_patch_wait,
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.assign_to_channel = syncpt_assign_to_channel,
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.enable_protection = syncpt_enable_protection,
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};
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