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4591243102
The at91sam9n12 and at91sam9x5 usb clocks do not propagate rate modification requests to their parents. This causes a bug when the PLLB is left uninitialized by the bootloader (PLL multiplier set to 0, or in other words, PLL rate = 0 Hz). Implement the determinate_rate method and propagate the change rate request to the parent clk. Cc: <stable@vger.kernel.org> # v3.14+ Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reported-by: Bo Shen <voice.shen@atmel.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Michael Turquette <mturquette@linaro.org> |
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.. | ||
clk-h32mx.c | ||
clk-main.c | ||
clk-master.c | ||
clk-peripheral.c | ||
clk-pll.c | ||
clk-plldiv.c | ||
clk-programmable.c | ||
clk-slow.c | ||
clk-smd.c | ||
clk-system.c | ||
clk-usb.c | ||
clk-utmi.c | ||
Makefile | ||
pmc.c | ||
pmc.h | ||
sckc.c | ||
sckc.h |