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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/*
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* include/asm-xtensa/msgbuf.h
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*
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* The msqid64_ds structure for the Xtensa architecture.
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* Note extra padding because this structure is passed back and forth
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* between kernel and user space.
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*
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* Pad space is left for:
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* - 64-bit time_t to solve y2038 problem
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* - 2 miscellaneous 32-bit values
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*/
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#ifndef _XTENSA_MSGBUF_H
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#define _XTENSA_MSGBUF_H
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struct msqid64_ds {
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struct ipc64_perm msg_perm;
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#ifdef __XTENSA_EB__
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unsigned int __unused1;
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__kernel_time_t msg_stime; /* last msgsnd time */
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unsigned int __unused2;
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__kernel_time_t msg_rtime; /* last msgrcv time */
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unsigned int __unused3;
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__kernel_time_t msg_ctime; /* last change time */
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#elif defined(__XTENSA_EL__)
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__kernel_time_t msg_stime; /* last msgsnd time */
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unsigned int __unused1;
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__kernel_time_t msg_rtime; /* last msgrcv time */
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unsigned int __unused2;
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__kernel_time_t msg_ctime; /* last change time */
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unsigned int __unused3;
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#else
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# error processor byte order undefined!
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#endif
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unsigned long msg_cbytes; /* current number of bytes on queue */
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unsigned long msg_qnum; /* number of messages in queue */
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unsigned long msg_qbytes; /* max number of bytes on queue */
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__kernel_pid_t msg_lspid; /* pid of last msgsnd */
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__kernel_pid_t msg_lrpid; /* last receive pid */
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unsigned long __unused4;
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unsigned long __unused5;
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};
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#endif /* _XTENSA_MSGBUF_H */
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