mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 07:56:44 +07:00
401 lines
8.6 KiB
Plaintext
401 lines
8.6 KiB
Plaintext
/* fuc microcode util functions for nvc0 PGRAPH
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*
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* Copyright 2011 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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define(`mmctx_data', `.b32 eval((($2 - 1) << 26) | $1)')
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define(`queue_init', `.skip eval((2 * 4) + ((8 * 4) * 2))')
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ifdef(`include_code', `
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// Error codes
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define(`E_BAD_COMMAND', 0x01)
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define(`E_CMD_OVERFLOW', 0x02)
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// Util macros to help with debugging ucode hangs etc
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define(`T_WAIT', 0)
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define(`T_MMCTX', 1)
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define(`T_STRWAIT', 2)
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define(`T_STRINIT', 3)
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define(`T_AUTO', 4)
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define(`T_CHAN', 5)
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define(`T_LOAD', 6)
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define(`T_SAVE', 7)
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define(`T_LCHAN', 8)
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define(`T_LCTXH', 9)
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define(`trace_set', `
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mov $r8 0x83c
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shl b32 $r8 6
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clear b32 $r9
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bset $r9 $1
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iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
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')
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define(`trace_clr', `
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mov $r8 0x85c
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shl b32 $r8 6
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clear b32 $r9
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bset $r9 $1
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iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
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')
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// queue_put - add request to queue
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//
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// In : $r13 queue pointer
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// $r14 command
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// $r15 data
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//
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queue_put:
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// make sure we have space..
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ld b32 $r8 D[$r13 + 0x0] // GET
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ld b32 $r9 D[$r13 + 0x4] // PUT
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xor $r8 8
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cmpu b32 $r8 $r9
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bra ne #queue_put_next
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mov $r15 E_CMD_OVERFLOW
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call #error
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ret
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// store cmd/data on queue
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queue_put_next:
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and $r8 $r9 7
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shl b32 $r8 3
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add b32 $r8 $r13
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add b32 $r8 8
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st b32 D[$r8 + 0x0] $r14
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st b32 D[$r8 + 0x4] $r15
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// update PUT
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add b32 $r9 1
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and $r9 0xf
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st b32 D[$r13 + 0x4] $r9
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ret
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// queue_get - fetch request from queue
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//
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// In : $r13 queue pointer
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//
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// Out: $p1 clear on success (data available)
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// $r14 command
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// $r15 data
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//
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queue_get:
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bset $flags $p1
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ld b32 $r8 D[$r13 + 0x0] // GET
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ld b32 $r9 D[$r13 + 0x4] // PUT
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cmpu b32 $r8 $r9
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bra e #queue_get_done
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// fetch first cmd/data pair
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and $r9 $r8 7
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shl b32 $r9 3
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add b32 $r9 $r13
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add b32 $r9 8
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ld b32 $r14 D[$r9 + 0x0]
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ld b32 $r15 D[$r9 + 0x4]
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// update GET
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add b32 $r8 1
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and $r8 0xf
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st b32 D[$r13 + 0x0] $r8
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bclr $flags $p1
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queue_get_done:
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ret
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// nv_rd32 - read 32-bit value from nv register
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//
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// In : $r14 register
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// Out: $r15 value
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//
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nv_rd32:
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mov $r11 0x728
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shl b32 $r11 6
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mov b32 $r12 $r14
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bset $r12 31 // MMIO_CTRL_PENDING
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iowr I[$r11 + 0x000] $r12 // MMIO_CTRL
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nv_rd32_wait:
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iord $r12 I[$r11 + 0x000]
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xbit $r12 $r12 31
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bra ne #nv_rd32_wait
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mov $r10 6 // DONE_MMIO_RD
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call #wait_doneo
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iord $r15 I[$r11 + 0x100] // MMIO_RDVAL
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ret
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// nv_wr32 - write 32-bit value to nv register
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//
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// In : $r14 register
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// $r15 value
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//
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nv_wr32:
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mov $r11 0x728
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shl b32 $r11 6
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iowr I[$r11 + 0x200] $r15 // MMIO_WRVAL
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mov b32 $r12 $r14
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bset $r12 31 // MMIO_CTRL_PENDING
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bset $r12 30 // MMIO_CTRL_WRITE
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iowr I[$r11 + 0x000] $r12 // MMIO_CTRL
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nv_wr32_wait:
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iord $r12 I[$r11 + 0x000]
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xbit $r12 $r12 31
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bra ne #nv_wr32_wait
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ret
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// (re)set watchdog timer
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//
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// In : $r15 timeout
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//
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watchdog_reset:
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mov $r8 0x430
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shl b32 $r8 6
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bset $r15 31
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iowr I[$r8 + 0x000] $r15
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ret
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// clear watchdog timer
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watchdog_clear:
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mov $r8 0x430
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shl b32 $r8 6
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iowr I[$r8 + 0x000] $r0
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ret
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// wait_done{z,o} - wait on FUC_DONE bit to become clear/set
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//
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// In : $r10 bit to wait on
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//
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define(`wait_done', `
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$1:
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trace_set(T_WAIT);
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mov $r8 0x818
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shl b32 $r8 6
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iowr I[$r8 + 0x000] $r10 // CC_SCRATCH[6] = wait bit
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wait_done_$1:
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mov $r8 0x400
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shl b32 $r8 6
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iord $r8 I[$r8 + 0x000] // DONE
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xbit $r8 $r8 $r10
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bra $2 #wait_done_$1
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trace_clr(T_WAIT)
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ret
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')
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wait_done(wait_donez, ne)
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wait_done(wait_doneo, e)
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// mmctx_size - determine size of a mmio list transfer
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//
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// In : $r14 mmio list head
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// $r15 mmio list tail
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// Out: $r15 transfer size (in bytes)
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//
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mmctx_size:
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clear b32 $r9
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nv_mmctx_size_loop:
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ld b32 $r8 D[$r14]
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shr b32 $r8 26
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add b32 $r8 1
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shl b32 $r8 2
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add b32 $r9 $r8
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add b32 $r14 4
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cmpu b32 $r14 $r15
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bra ne #nv_mmctx_size_loop
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mov b32 $r15 $r9
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ret
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// mmctx_xfer - execute a list of mmio transfers
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//
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// In : $r10 flags
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// bit 0: direction (0 = save, 1 = load)
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// bit 1: set if first transfer
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// bit 2: set if last transfer
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// $r11 base
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// $r12 mmio list head
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// $r13 mmio list tail
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// $r14 multi_stride
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// $r15 multi_mask
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//
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mmctx_xfer:
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trace_set(T_MMCTX)
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mov $r8 0x710
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shl b32 $r8 6
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clear b32 $r9
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or $r11 $r11
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bra e #mmctx_base_disabled
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iowr I[$r8 + 0x000] $r11 // MMCTX_BASE
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bset $r9 0 // BASE_EN
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mmctx_base_disabled:
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or $r14 $r14
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bra e #mmctx_multi_disabled
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iowr I[$r8 + 0x200] $r14 // MMCTX_MULTI_STRIDE
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iowr I[$r8 + 0x300] $r15 // MMCTX_MULTI_MASK
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bset $r9 1 // MULTI_EN
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mmctx_multi_disabled:
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add b32 $r8 0x100
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xbit $r11 $r10 0
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shl b32 $r11 16 // DIR
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bset $r11 12 // QLIMIT = 0x10
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xbit $r14 $r10 1
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shl b32 $r14 17
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or $r11 $r14 // START_TRIGGER
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iowr I[$r8 + 0x000] $r11 // MMCTX_CTRL
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// loop over the mmio list, and send requests to the hw
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mmctx_exec_loop:
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// wait for space in mmctx queue
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mmctx_wait_free:
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iord $r14 I[$r8 + 0x000] // MMCTX_CTRL
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and $r14 0x1f
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bra e #mmctx_wait_free
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// queue up an entry
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ld b32 $r14 D[$r12]
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or $r14 $r9
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iowr I[$r8 + 0x300] $r14
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add b32 $r12 4
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cmpu b32 $r12 $r13
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bra ne #mmctx_exec_loop
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xbit $r11 $r10 2
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bra ne #mmctx_stop
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// wait for queue to empty
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mmctx_fini_wait:
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iord $r11 I[$r8 + 0x000] // MMCTX_CTRL
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and $r11 0x1f
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cmpu b32 $r11 0x10
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bra ne #mmctx_fini_wait
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mov $r10 2 // DONE_MMCTX
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call #wait_donez
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bra #mmctx_done
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mmctx_stop:
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xbit $r11 $r10 0
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shl b32 $r11 16 // DIR
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bset $r11 12 // QLIMIT = 0x10
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bset $r11 18 // STOP_TRIGGER
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iowr I[$r8 + 0x000] $r11 // MMCTX_CTRL
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mmctx_stop_wait:
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// wait for STOP_TRIGGER to clear
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iord $r11 I[$r8 + 0x000] // MMCTX_CTRL
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xbit $r11 $r11 18
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bra ne #mmctx_stop_wait
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mmctx_done:
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trace_clr(T_MMCTX)
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ret
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// Wait for DONE_STRAND
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//
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strand_wait:
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push $r10
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mov $r10 2
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call #wait_donez
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pop $r10
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ret
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// unknown - call before issuing strand commands
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//
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strand_pre:
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mov $r8 0x4afc
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sethi $r8 0x20000
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mov $r9 0xc
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iowr I[$r8] $r9
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call #strand_wait
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ret
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// unknown - call after issuing strand commands
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//
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strand_post:
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mov $r8 0x4afc
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sethi $r8 0x20000
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mov $r9 0xd
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iowr I[$r8] $r9
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call #strand_wait
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ret
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// Selects strand set?!
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//
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// In: $r14 id
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//
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strand_set:
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mov $r10 0x4ffc
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sethi $r10 0x20000
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sub b32 $r11 $r10 0x500
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mov $r12 0xf
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iowr I[$r10 + 0x000] $r12 // 0x93c = 0xf
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mov $r12 0xb
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iowr I[$r11 + 0x000] $r12 // 0x928 = 0xb
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call #strand_wait
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iowr I[$r10 + 0x000] $r14 // 0x93c = <id>
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mov $r12 0xa
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iowr I[$r11 + 0x000] $r12 // 0x928 = 0xa
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call #strand_wait
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ret
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// Initialise strand context data
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//
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// In : $r15 context base
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// Out: $r15 context size (in bytes)
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//
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// Strandset(?) 3 hardcoded currently
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//
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strand_ctx_init:
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trace_set(T_STRINIT)
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call #strand_pre
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mov $r14 3
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call #strand_set
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mov $r10 0x46fc
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sethi $r10 0x20000
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add b32 $r11 $r10 0x400
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iowr I[$r10 + 0x100] $r0 // STRAND_FIRST_GENE = 0
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mov $r12 1
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iowr I[$r11 + 0x000] $r12 // STRAND_CMD = LATCH_FIRST_GENE
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call #strand_wait
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sub b32 $r12 $r0 1
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iowr I[$r10 + 0x000] $r12 // STRAND_GENE_CNT = 0xffffffff
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mov $r12 2
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iowr I[$r11 + 0x000] $r12 // STRAND_CMD = LATCH_GENE_CNT
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call #strand_wait
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call #strand_post
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// read the size of each strand, poke the context offset of
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// each into STRAND_{SAVE,LOAD}_SWBASE now, no need to worry
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// about it later then.
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mov $r8 0x880
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shl b32 $r8 6
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iord $r9 I[$r8 + 0x000] // STRANDS
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add b32 $r8 0x2200
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shr b32 $r14 $r15 8
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ctx_init_strand_loop:
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iowr I[$r8 + 0x000] $r14 // STRAND_SAVE_SWBASE
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iowr I[$r8 + 0x100] $r14 // STRAND_LOAD_SWBASE
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iord $r10 I[$r8 + 0x200] // STRAND_SIZE
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shr b32 $r10 6
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add b32 $r10 1
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add b32 $r14 $r10
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add b32 $r8 4
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sub b32 $r9 1
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bra ne #ctx_init_strand_loop
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shl b32 $r14 8
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sub b32 $r15 $r14 $r15
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trace_clr(T_STRINIT)
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ret
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')
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