Ville Syrjälä 44913155f0 drm/i915: Store max cdclk value in dev_priv ... Keep the cdclk maximum supported frequency around in dev_priv so that we can verify certain things against it before actually changing the cdclk frequency. For now only VLV/CHV have support changing cdclk frequency, so other plarforms get to assume cdclk is fixed. v2: Rebased to the latest v3: Rebased to the latest v4: Fix for patch style problems Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2015-06-12 13:14:33 +03:00
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drm	drm/i915: Store max cdclk value in dev_priv	2015-06-12 13:14:33 +03:00
host1x	gpu: host1x: Export host1x_syncpt_read()	2015-04-02 18:46:20 +02:00
ipu-v3	imx-drm changes to use media bus formats and LDB drm_panel support	2015-04-13 17:28:57 +10:00
vga
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00