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In the new DTS bindings for DSA (dsa2), the "ethernet" and "link" phandles are respectively mandatory and exclusive to CPU port and DSA link device tree nodes. Simplify dsa2.c a bit by checking the presence of such phandle instead of checking the redundant "label" property. Then the Linux philosophy for Ethernet switch ports is to expose them to userspace as standard NICs by default. Thus use the standard enumerated "eth%d" device name if no "label" property is provided for a user port. This allows to save DTS files from subjective net device names. If one wants to rename an interface, udev rules can be used as usual. Of course the current behavior is unchanged, and the optional "label" property for user ports has precedence over the enumerated name. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Acked-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: David S. Miller <davem@davemloft.net>
415 lines
9.3 KiB
Plaintext
415 lines
9.3 KiB
Plaintext
Distributed Switch Architecture Device Tree Bindings
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----------------------------------------------------
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Two bindings exist, one of which has been deprecated due to
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limitations.
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Current Binding
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---------------
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Switches are true Linux devices and can be probes by any means. Once
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probed, they register to the DSA framework, passing a node
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pointer. This node is expected to fulfil the following binding, and
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may contain additional properties as required by the device it is
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embedded within.
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Required properties:
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- ports : A container for child nodes representing switch ports.
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Optional properties:
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- dsa,member : A two element list indicates which DSA cluster, and position
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within the cluster a switch takes. <0 0> is cluster 0,
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switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
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switch 0. A switch not part of any cluster (single device
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hanging off a CPU port) must not specify this property
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The ports container has the following properties
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Required properties:
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- #address-cells : Must be 1
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- #size-cells : Must be 0
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Each port children node must have the following mandatory properties:
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- reg : Describes the port address in the switch
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An uplink/downlink port between switches in the cluster has the following
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mandatory property:
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- link : Should be a list of phandles to other switch's DSA
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port. This port is used as the outgoing port
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towards the phandle ports. The full routing
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information must be given, not just the one hop
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routes to neighbouring switches.
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A CPU port has the following mandatory property:
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- ethernet : Should be a phandle to a valid Ethernet device node.
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This host device is what the switch port is
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connected to.
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A user port has the following optional property:
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- label : Describes the label associated with this port, which
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will become the netdev name.
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Port child nodes may also contain the following optional standardised
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properties, described in binding documents:
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- phy-handle : Phandle to a PHY on an MDIO bus. See
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Documentation/devicetree/bindings/net/ethernet.txt
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for details.
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- phy-mode : See
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Documentation/devicetree/bindings/net/ethernet.txt
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for details.
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- fixed-link : Fixed-link subnode describing a link to a non-MDIO
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managed entity. See
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Documentation/devicetree/bindings/net/fixed-link.txt
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for details.
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Example
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The following example shows three switches on three MDIO busses,
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linked into one DSA cluster.
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&mdio1 {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0: switch0@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan0";
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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switch0port5: port@5 {
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reg = <5>;
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phy-mode = "rgmii-txid";
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link = <&switch1port6
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&switch2port9>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@6 {
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reg = <6>;
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ethernet = <&fec1>;
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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};
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};
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};
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&mdio2 {
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#address-cells = <1>;
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#size-cells = <0>;
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switch1: switch1@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan3";
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phy-handle = <&switch1phy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan4";
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phy-handle = <&switch1phy1>;
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};
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port@2 {
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reg = <2>;
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label = "lan5";
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phy-handle = <&switch1phy2>;
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};
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switch1port5: port@5 {
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reg = <5>;
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link = <&switch2port9>;
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phy-mode = "rgmii-txid";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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switch1port6: port@6 {
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reg = <6>;
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phy-mode = "rgmii-txid";
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link = <&switch0port5>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch1phy0: switch1phy0@0 {
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reg = <0>;
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};
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switch1phy1: switch1phy0@1 {
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reg = <1>;
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};
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switch1phy2: switch1phy0@2 {
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reg = <2>;
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};
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};
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};
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};
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&mdio4 {
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#address-cells = <1>;
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#size-cells = <0>;
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switch2: switch2@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan6";
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};
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port@1 {
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reg = <1>;
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label = "lan7";
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};
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port@2 {
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reg = <2>;
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label = "lan8";
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};
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port@3 {
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reg = <3>;
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label = "optical3";
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fixed-link {
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speed = <1000>;
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full-duplex;
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link-gpios = <&gpio6 2
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GPIO_ACTIVE_HIGH>;
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};
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};
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port@4 {
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reg = <4>;
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label = "optical4";
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fixed-link {
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speed = <1000>;
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full-duplex;
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link-gpios = <&gpio6 3
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GPIO_ACTIVE_HIGH>;
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};
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};
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switch2port9: port@9 {
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reg = <9>;
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phy-mode = "rgmii-txid";
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link = <&switch1port5
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&switch0port5>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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Deprecated Binding
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------------------
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The deprecated binding makes use of a platform device to represent the
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switches. The switches themselves are not Linux devices, and make use
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of an MDIO bus for management.
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Required properties:
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- compatible : Should be "marvell,dsa"
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- #address-cells : Must be 2, first cell is the address on the MDIO bus
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and second cell is the address in the switch tree.
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Second cell is used only when cascading/chaining.
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- #size-cells : Must be 0
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- dsa,ethernet : Should be a phandle to a valid Ethernet device node
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- dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
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Optional properties:
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- interrupts : property with a value describing the switch
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interrupt number (not supported by the driver)
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A DSA node can contain multiple switch chips which are therefore child nodes of
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the parent DSA node. The maximum number of allowed child nodes is 4
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(DSA_MAX_SWITCHES).
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Each of these switch child nodes should have the following required properties:
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- reg : Contains two fields. The first one describes the
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address on the MII bus. The second is the switch
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number that must be unique in cascaded configurations
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- #address-cells : Must be 1
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- #size-cells : Must be 0
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A switch child node has the following optional property:
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- eeprom-length : Set to the length of an EEPROM connected to the
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switch. Must be set if the switch can not detect
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the presence and/or size of a connected EEPROM,
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otherwise optional.
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A switch may have multiple "port" children nodes
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Each port children node must have the following mandatory properties:
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- reg : Describes the port address in the switch
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- label : Describes the label associated with this port, special
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labels are "cpu" to indicate a CPU port and "dsa" to
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indicate an uplink/downlink port.
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Note that a port labelled "dsa" will imply checking for the uplink phandle
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described below.
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Optional property:
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- link : Should be a list of phandles to another switch's DSA port.
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This property is only used when switches are being
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chained/cascaded together. This port is used as outgoing port
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towards the phandle port, which can be more than one hop away.
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- phy-handle : Phandle to a PHY on an external MDIO bus, not the
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switch internal one. See
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Documentation/devicetree/bindings/net/ethernet.txt
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for details.
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- phy-mode : String representing the connection to the designated
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PHY node specified by the 'phy-handle' property. See
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Documentation/devicetree/bindings/net/ethernet.txt
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for details.
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- mii-bus : Should be a phandle to a valid MDIO bus device node.
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This mii-bus will be used in preference to the
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global dsa,mii-bus defined above, for this switch.
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Optional subnodes:
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- fixed-link : Fixed-link subnode describing a link to a non-MDIO
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managed entity. See
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Documentation/devicetree/bindings/net/fixed-link.txt
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for details.
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Example:
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dsa@0 {
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compatible = "marvell,dsa";
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#address-cells = <2>;
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#size-cells = <0>;
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interrupts = <10>;
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dsa,ethernet = <ðernet0>;
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dsa,mii-bus = <&mii_bus0>;
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switch@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <16 0>; /* MDIO address 16, switch 0 in tree */
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port@0 {
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reg = <0>;
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label = "lan1";
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phy-handle = <&phy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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};
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switch0port6: port@6 {
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reg = <6>;
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label = "dsa";
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link = <&switch1port0
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&switch2port0>;
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};
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};
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switch@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <17 1>; /* MDIO address 17, switch 1 in tree */
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mii-bus = <&mii_bus1>;
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reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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switch1port0: port@0 {
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reg = <0>;
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label = "dsa";
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link = <&switch0port6>;
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};
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switch1port1: port@1 {
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reg = <1>;
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label = "dsa";
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link = <&switch2port1>;
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};
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};
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switch@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <18 2>; /* MDIO address 18, switch 2 in tree */
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mii-bus = <&mii_bus1>;
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switch2port0: port@0 {
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reg = <0>;
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label = "dsa";
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link = <&switch1port1
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&switch0port6>;
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};
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};
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};
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