mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 09:56:55 +07:00
c91e02bd97
Use perf framework to manage hardware instruction and data breakpoints. Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to query and set instruction and data breakpoints. Address bit 0 choose instruction (0) or data (1) break register, bits 31..1 are the register number. Both calls transfer two 32-bit words: address (0) and control (1). Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set. Data breakpoint control word bit 31 is 'trigger on store', bit 30 is 'trigger on load, bits 29..0 are length. Length 0 is used to clear a breakpoint. To set a breakpoint length must be a power of 2 in the range 1..64 and the address must be length-aligned. Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug exception is raised by the kernel code accessing watched userspace address and disable corresponding data breakpoint. On exit to userspace check that flag and, if set, restore all data breakpoints. Handle debug exceptions raised with PS.EXCM set. This may happen when window overflow/underflow handler or fast exception handler hits data breakpoint, in which case save and disable all data breakpoints, single-step faulting instruction and restore data breakpoints. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
362 lines
9.7 KiB
C
362 lines
9.7 KiB
C
/*
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* arch/xtensa/kernel/process.c
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*
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* Xtensa Processor version.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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* Chris Zankel <chris@zankel.net>
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* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
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* Kevin Chea
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/elf.h>
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#include <linux/hw_breakpoint.h>
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#include <linux/init.h>
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#include <linux/prctl.h>
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#include <linux/init_task.h>
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#include <linux/module.h>
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#include <linux/mqueue.h>
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#include <linux/fs.h>
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#include <linux/slab.h>
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#include <linux/rcupdate.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/platform.h>
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#include <asm/mmu.h>
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#include <asm/irq.h>
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#include <linux/atomic.h>
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#include <asm/asm-offsets.h>
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#include <asm/regs.h>
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#include <asm/hw_breakpoint.h>
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extern void ret_from_fork(void);
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extern void ret_from_kernel_thread(void);
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struct task_struct *current_set[NR_CPUS] = {&init_task, };
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void (*pm_power_off)(void) = NULL;
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EXPORT_SYMBOL(pm_power_off);
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#if XTENSA_HAVE_COPROCESSORS
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void coprocessor_release_all(struct thread_info *ti)
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{
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unsigned long cpenable;
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int i;
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/* Make sure we don't switch tasks during this operation. */
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preempt_disable();
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/* Walk through all cp owners and release it for the requested one. */
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cpenable = ti->cpenable;
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if (coprocessor_owner[i] == ti) {
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coprocessor_owner[i] = 0;
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cpenable &= ~(1 << i);
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}
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}
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ti->cpenable = cpenable;
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coprocessor_clear_cpenable();
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preempt_enable();
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}
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void coprocessor_flush_all(struct thread_info *ti)
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{
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unsigned long cpenable;
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int i;
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preempt_disable();
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cpenable = ti->cpenable;
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if ((cpenable & 1) != 0 && coprocessor_owner[i] == ti)
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coprocessor_flush(ti, i);
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cpenable >>= 1;
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}
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preempt_enable();
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}
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#endif
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/*
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* Powermanagement idle function, if any is provided by the platform.
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*/
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void arch_cpu_idle(void)
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{
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platform_idle();
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}
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/*
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* This is called when the thread calls exit().
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*/
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void exit_thread(void)
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{
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#if XTENSA_HAVE_COPROCESSORS
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coprocessor_release_all(current_thread_info());
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#endif
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}
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/*
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* Flush thread state. This is called when a thread does an execve()
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* Note that we flush coprocessor registers for the case execve fails.
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*/
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void flush_thread(void)
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{
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#if XTENSA_HAVE_COPROCESSORS
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struct thread_info *ti = current_thread_info();
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coprocessor_flush_all(ti);
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coprocessor_release_all(ti);
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#endif
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flush_ptrace_hw_breakpoint(current);
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}
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/*
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* this gets called so that we can store coprocessor state into memory and
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* copy the current task into the new thread.
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*/
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int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
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{
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#if XTENSA_HAVE_COPROCESSORS
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coprocessor_flush_all(task_thread_info(src));
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#endif
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*dst = *src;
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return 0;
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}
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/*
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* Copy thread.
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*
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* There are two modes in which this function is called:
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* 1) Userspace thread creation,
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* regs != NULL, usp_thread_fn is userspace stack pointer.
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* It is expected to copy parent regs (in case CLONE_VM is not set
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* in the clone_flags) and set up passed usp in the childregs.
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* 2) Kernel thread creation,
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* regs == NULL, usp_thread_fn is the function to run in the new thread
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* and thread_fn_arg is its parameter.
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* childregs are not used for the kernel threads.
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*
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* The stack layout for the new thread looks like this:
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*
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* +------------------------+
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* | childregs |
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* +------------------------+ <- thread.sp = sp in dummy-frame
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* | dummy-frame | (saved in dummy-frame spill-area)
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* +------------------------+
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*
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* We create a dummy frame to return to either ret_from_fork or
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* ret_from_kernel_thread:
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* a0 points to ret_from_fork/ret_from_kernel_thread (simulating a call4)
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* sp points to itself (thread.sp)
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* a2, a3 are unused for userspace threads,
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* a2 points to thread_fn, a3 holds thread_fn arg for kernel threads.
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*
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* Note: This is a pristine frame, so we don't need any spill region on top of
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* childregs.
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*
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* The fun part: if we're keeping the same VM (i.e. cloning a thread,
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* not an entire process), we're normally given a new usp, and we CANNOT share
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* any live address register windows. If we just copy those live frames over,
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* the two threads (parent and child) will overflow the same frames onto the
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* parent stack at different times, likely corrupting the parent stack (esp.
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* if the parent returns from functions that called clone() and calls new
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* ones, before the child overflows its now old copies of its parent windows).
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* One solution is to spill windows to the parent stack, but that's fairly
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* involved. Much simpler to just not copy those live frames across.
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*/
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int copy_thread(unsigned long clone_flags, unsigned long usp_thread_fn,
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unsigned long thread_fn_arg, struct task_struct *p)
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{
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struct pt_regs *childregs = task_pt_regs(p);
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#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
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struct thread_info *ti;
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#endif
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/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
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*((int*)childregs - 3) = (unsigned long)childregs;
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*((int*)childregs - 4) = 0;
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p->thread.sp = (unsigned long)childregs;
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if (!(p->flags & PF_KTHREAD)) {
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struct pt_regs *regs = current_pt_regs();
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unsigned long usp = usp_thread_fn ?
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usp_thread_fn : regs->areg[1];
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p->thread.ra = MAKE_RA_FOR_CALL(
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(unsigned long)ret_from_fork, 0x1);
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/* This does not copy all the regs.
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* In a bout of brilliance or madness,
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* ARs beyond a0-a15 exist past the end of the struct.
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*/
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*childregs = *regs;
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childregs->areg[1] = usp;
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childregs->areg[2] = 0;
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/* When sharing memory with the parent thread, the child
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usually starts on a pristine stack, so we have to reset
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windowbase, windowstart and wmask.
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(Note that such a new thread is required to always create
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an initial call4 frame)
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The exception is vfork, where the new thread continues to
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run on the parent's stack until it calls execve. This could
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be a call8 or call12, which requires a legal stack frame
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of the previous caller for the overflow handlers to work.
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(Note that it's always legal to overflow live registers).
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In this case, ensure to spill at least the stack pointer
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of that frame. */
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if (clone_flags & CLONE_VM) {
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/* check that caller window is live and same stack */
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int len = childregs->wmask & ~0xf;
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if (regs->areg[1] == usp && len != 0) {
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int callinc = (regs->areg[0] >> 30) & 3;
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int caller_ars = XCHAL_NUM_AREGS - callinc * 4;
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put_user(regs->areg[caller_ars+1],
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(unsigned __user*)(usp - 12));
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}
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childregs->wmask = 1;
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childregs->windowstart = 1;
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childregs->windowbase = 0;
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} else {
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int len = childregs->wmask & ~0xf;
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memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
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®s->areg[XCHAL_NUM_AREGS - len/4], len);
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}
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/* The thread pointer is passed in the '4th argument' (= a5) */
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if (clone_flags & CLONE_SETTLS)
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childregs->threadptr = childregs->areg[5];
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} else {
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p->thread.ra = MAKE_RA_FOR_CALL(
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(unsigned long)ret_from_kernel_thread, 1);
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/* pass parameters to ret_from_kernel_thread:
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* a2 = thread_fn, a3 = thread_fn arg
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*/
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*((int *)childregs - 1) = thread_fn_arg;
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*((int *)childregs - 2) = usp_thread_fn;
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/* Childregs are only used when we're going to userspace
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* in which case start_thread will set them up.
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*/
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}
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#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
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ti = task_thread_info(p);
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ti->cpenable = 0;
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#endif
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clear_ptrace_hw_breakpoint(p);
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return 0;
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}
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/*
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* These bracket the sleeping functions..
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*/
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unsigned long get_wchan(struct task_struct *p)
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{
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unsigned long sp, pc;
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unsigned long stack_page = (unsigned long) task_stack_page(p);
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int count = 0;
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if (!p || p == current || p->state == TASK_RUNNING)
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return 0;
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sp = p->thread.sp;
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pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
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do {
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if (sp < stack_page + sizeof(struct task_struct) ||
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sp >= (stack_page + THREAD_SIZE) ||
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pc == 0)
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return 0;
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if (!in_sched_functions(pc))
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return pc;
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/* Stack layout: sp-4: ra, sp-3: sp' */
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pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
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sp = *(unsigned long *)sp - 3;
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} while (count++ < 16);
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return 0;
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}
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/*
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* xtensa_gregset_t and 'struct pt_regs' are vastly different formats
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* of processor registers. Besides different ordering,
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* xtensa_gregset_t contains non-live register information that
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* 'struct pt_regs' does not. Exception handling (primarily) uses
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* 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t.
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*
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*/
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void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
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{
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unsigned long wb, ws, wm;
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int live, last;
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wb = regs->windowbase;
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ws = regs->windowstart;
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wm = regs->wmask;
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ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1);
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/* Don't leak any random bits. */
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memset(elfregs, 0, sizeof(*elfregs));
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/* Note: PS.EXCM is not set while user task is running; its
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* being set in regs->ps is for exception handling convenience.
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*/
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elfregs->pc = regs->pc;
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elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT));
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elfregs->lbeg = regs->lbeg;
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elfregs->lend = regs->lend;
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elfregs->lcount = regs->lcount;
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elfregs->sar = regs->sar;
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elfregs->windowstart = ws;
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live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16;
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last = XCHAL_NUM_AREGS - (wm >> 4) * 4;
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memcpy(elfregs->a, regs->areg, live * 4);
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memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16);
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}
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int dump_fpu(void)
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{
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return 0;
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}
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