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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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89c7e4b8bb
The ARM ARM requires branch predictor maintenance if, for a given ASID, the instructions at a specific virtual address appear to change. From the kernel's point of view, that means: - Changing the kernel's view of memory (e.g. switching to the identity map) - ASID rollover (since ASIDs will be re-allocated to new tasks) This patch adds explicit branch predictor maintenance when either of the two conditions above are met. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
155 lines
3.6 KiB
C
155 lines
3.6 KiB
C
#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <asm/cputype.h>
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#include <asm/idmap.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/sections.h>
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#include <asm/system_info.h>
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#include <asm/virt.h>
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pgd_t *idmap_pgd;
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#ifdef CONFIG_ARM_LPAE
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static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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pmd_t *pmd;
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unsigned long next;
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if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
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pmd = pmd_alloc_one(&init_mm, addr);
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if (!pmd) {
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pr_warning("Failed to allocate identity pmd.\n");
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return;
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}
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pud_populate(&init_mm, pud, pmd);
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pmd += pmd_index(addr);
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} else
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pmd = pmd_offset(pud, addr);
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do {
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next = pmd_addr_end(addr, end);
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*pmd = __pmd((addr & PMD_MASK) | prot);
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flush_pmd_entry(pmd);
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} while (pmd++, addr = next, addr != end);
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}
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#else /* !CONFIG_ARM_LPAE */
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static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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pmd_t *pmd = pmd_offset(pud, addr);
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addr = (addr & PMD_MASK) | prot;
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pmd[0] = __pmd(addr);
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addr += SECTION_SIZE;
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pmd[1] = __pmd(addr);
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flush_pmd_entry(pmd);
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}
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#endif /* CONFIG_ARM_LPAE */
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static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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pud_t *pud = pud_offset(pgd, addr);
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unsigned long next;
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do {
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next = pud_addr_end(addr, end);
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idmap_add_pmd(pud, addr, next, prot);
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} while (pud++, addr = next, addr != end);
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}
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static void identity_mapping_add(pgd_t *pgd, const char *text_start,
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const char *text_end, unsigned long prot)
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{
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unsigned long addr, end;
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unsigned long next;
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addr = virt_to_phys(text_start);
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end = virt_to_phys(text_end);
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prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
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if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
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prot |= PMD_BIT4;
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pgd += pgd_index(addr);
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do {
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next = pgd_addr_end(addr, end);
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idmap_add_pud(pgd, addr, next, prot);
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} while (pgd++, addr = next, addr != end);
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}
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#if defined(CONFIG_ARM_VIRT_EXT) && defined(CONFIG_ARM_LPAE)
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pgd_t *hyp_pgd;
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extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];
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static int __init init_static_idmap_hyp(void)
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{
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hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL);
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if (!hyp_pgd)
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return -ENOMEM;
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pr_info("Setting up static HYP identity map for 0x%p - 0x%p\n",
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__hyp_idmap_text_start, __hyp_idmap_text_end);
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identity_mapping_add(hyp_pgd, __hyp_idmap_text_start,
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__hyp_idmap_text_end, PMD_SECT_AP1);
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return 0;
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}
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#else
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static int __init init_static_idmap_hyp(void)
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{
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return 0;
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}
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#endif
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extern char __idmap_text_start[], __idmap_text_end[];
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static int __init init_static_idmap(void)
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{
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int ret;
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idmap_pgd = pgd_alloc(&init_mm);
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if (!idmap_pgd)
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return -ENOMEM;
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pr_info("Setting up static identity map for 0x%p - 0x%p\n",
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__idmap_text_start, __idmap_text_end);
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identity_mapping_add(idmap_pgd, __idmap_text_start,
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__idmap_text_end, 0);
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ret = init_static_idmap_hyp();
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/* Flush L1 for the hardware to see this page table content */
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flush_cache_louis();
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return ret;
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}
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early_initcall(init_static_idmap);
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/*
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* In order to soft-boot, we need to switch to a 1:1 mapping for the
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* cpu_reset functions. This will then ensure that we have predictable
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* results when turning off the mmu.
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*/
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void setup_mm_for_reboot(void)
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{
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/* Switch to the identity mapping. */
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cpu_switch_mm(idmap_pgd, &init_mm);
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local_flush_bp_all();
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#ifdef CONFIG_CPU_HAS_ASID
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/*
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* We don't have a clean ASID for the identity mapping, which
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* may clash with virtual addresses of the previous page tables
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* and therefore potentially in the TLB.
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*/
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local_flush_tlb_all();
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#endif
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}
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