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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8fe088850f
Sparse doesn't seem to be passing -maltivec around properly, leading to lots of errors: .../include/altivec.h:34:2: error: Use the "-maltivec" flag to enable PowerPC AltiVec support arch/powerpc/lib/xor_vmx.c:27:16: error: Expected ; at end of declaration arch/powerpc/lib/xor_vmx.c:27:16: error: got signed arch/powerpc/lib/xor_vmx.c:60:9: error: No right hand side of '*'-expression arch/powerpc/lib/xor_vmx.c:60:9: error: Expected ; at end of statement arch/powerpc/lib/xor_vmx.c:60:9: error: got v1_in ... arch/powerpc/lib/xor_vmx.c:87:9: error: too many errors Only include the altivec.h header for non-__CHECKER__ builds. For builds with __CHECKER__, make up some stubs instead, as suggested by Balbir. (The vector size of 16 is arbitrary.) Suggested-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Daniel Axtens <dja@axtens.net> Tested-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
192 lines
3.7 KiB
C
192 lines
3.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) IBM Corporation, 2012
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*
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* Author: Anton Blanchard <anton@au.ibm.com>
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*/
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/*
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* Sparse (as at v0.5.0) gets very, very confused by this file.
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* Make it a bit simpler for it.
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*/
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#if !defined(__CHECKER__)
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#include <altivec.h>
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#else
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#define vec_xor(a, b) a ^ b
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#define vector __attribute__((vector_size(16)))
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#endif
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#include <linux/preempt.h>
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#include <linux/export.h>
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#include <linux/sched.h>
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#include <asm/switch_to.h>
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typedef vector signed char unative_t;
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#define DEFINE(V) \
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unative_t *V = (unative_t *)V##_in; \
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unative_t V##_0, V##_1, V##_2, V##_3
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#define LOAD(V) \
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do { \
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V##_0 = V[0]; \
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V##_1 = V[1]; \
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V##_2 = V[2]; \
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V##_3 = V[3]; \
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} while (0)
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#define STORE(V) \
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do { \
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V[0] = V##_0; \
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V[1] = V##_1; \
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V[2] = V##_2; \
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V[3] = V##_3; \
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} while (0)
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#define XOR(V1, V2) \
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do { \
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V1##_0 = vec_xor(V1##_0, V2##_0); \
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V1##_1 = vec_xor(V1##_1, V2##_1); \
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V1##_2 = vec_xor(V1##_2, V2##_2); \
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V1##_3 = vec_xor(V1##_3, V2##_3); \
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} while (0)
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void xor_altivec_2(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in)
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{
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DEFINE(v1);
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DEFINE(v2);
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unsigned long lines = bytes / (sizeof(unative_t)) / 4;
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preempt_disable();
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enable_kernel_altivec();
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do {
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LOAD(v1);
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LOAD(v2);
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XOR(v1, v2);
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STORE(v1);
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v1 += 4;
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v2 += 4;
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} while (--lines > 0);
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disable_kernel_altivec();
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preempt_enable();
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}
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EXPORT_SYMBOL(xor_altivec_2);
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void xor_altivec_3(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in)
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{
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DEFINE(v1);
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DEFINE(v2);
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DEFINE(v3);
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unsigned long lines = bytes / (sizeof(unative_t)) / 4;
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preempt_disable();
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enable_kernel_altivec();
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do {
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LOAD(v1);
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LOAD(v2);
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LOAD(v3);
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XOR(v1, v2);
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XOR(v1, v3);
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STORE(v1);
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v1 += 4;
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v2 += 4;
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v3 += 4;
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} while (--lines > 0);
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disable_kernel_altivec();
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preempt_enable();
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}
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EXPORT_SYMBOL(xor_altivec_3);
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void xor_altivec_4(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in,
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unsigned long *v4_in)
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{
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DEFINE(v1);
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DEFINE(v2);
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DEFINE(v3);
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DEFINE(v4);
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unsigned long lines = bytes / (sizeof(unative_t)) / 4;
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preempt_disable();
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enable_kernel_altivec();
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do {
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LOAD(v1);
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LOAD(v2);
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LOAD(v3);
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LOAD(v4);
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XOR(v1, v2);
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XOR(v3, v4);
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XOR(v1, v3);
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STORE(v1);
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v1 += 4;
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v2 += 4;
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v3 += 4;
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v4 += 4;
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} while (--lines > 0);
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disable_kernel_altivec();
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preempt_enable();
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}
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EXPORT_SYMBOL(xor_altivec_4);
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void xor_altivec_5(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in,
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unsigned long *v4_in, unsigned long *v5_in)
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{
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DEFINE(v1);
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DEFINE(v2);
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DEFINE(v3);
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DEFINE(v4);
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DEFINE(v5);
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unsigned long lines = bytes / (sizeof(unative_t)) / 4;
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preempt_disable();
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enable_kernel_altivec();
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do {
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LOAD(v1);
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LOAD(v2);
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LOAD(v3);
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LOAD(v4);
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LOAD(v5);
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XOR(v1, v2);
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XOR(v3, v4);
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XOR(v1, v5);
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XOR(v1, v3);
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STORE(v1);
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v1 += 4;
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v2 += 4;
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v3 += 4;
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v4 += 4;
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v5 += 4;
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} while (--lines > 0);
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disable_kernel_altivec();
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preempt_enable();
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}
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EXPORT_SYMBOL(xor_altivec_5);
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